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An evaluation of high-level mechanistic core models
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Understanding fundamental design choices in single-ISA heterogeneous multicore architectures
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- Conference Paper
- C1
- open access
A mechanistic performance model for superscalar in-order processors
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- Conference Paper
- C1
- open access
Power-aware multi-core simulation for early design stage hardware/software co-optimization
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The shape of the processor design space and its implications for early stage explorations