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On the Organization and Implementation of a Fixed-Length Block Structured Instruction Set Architecture.
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Investigating the Implementation of a Block Structured Processor Architecture in an Early Design Stage.
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A fast, cache-aware algorithm for the calculation of radiological paths exploiting subword parallelism.
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Exploitable levels of ILP in future processors.
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Aspects of a Fixed-Length Block Structured Instruction Set to Improve Loop Performance
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Improving Loop Performance on a Block Structured Architecture through Predication
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On the use of subword parallelism in medical image processing.
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An Analytical Model for Performance Estimation of Modern Data-Flow Style Scheduling Microprocessors
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Microarchitectural Issues of a Fixed Length Block Structured Instruction Set Architecture
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Issues in Compilation for Fixed-Length Block Structured Instruction Set Architectures