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Low temperature SiGe:B source/drain epitaxy for CFET applications
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SiGe:B Source/Drain epitaxy for advanced device applications
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JST / ASPIRE project versatile quantum engineering of group-IV alloy materials for semiconductor heterogeneous integrated devices : Imec’s involvement
(2025) p.1-2 -
Epitaxial growth of up to 120x {Si0.8Ge0.2 / Si} bilayers in view of 3D DRAM applications
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- Journal Article
- A1
- open access
Epitaxial growth of up to 120× {Si0.8Ge0.2/Si} bilayers in view of three dimensional dynamic random access memory applications
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- Journal Article
- A1
- open access
Epitaxial Si/SiGe multi-stacks : from stacked nano-sheet to fork-sheet and CFET devices
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1.2 kV enhancement-mode p-GaN gate HEMTs on 200 mm engineered substrates
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- Conference Paper
- C3
- open access
III/V nano-ridge engineering for device integration on 300 mm silicon
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GaN-on-SOI : monolithically integrated All-GaN ICs for power conversion
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Gaining an edge with nano-ridges