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Tussen practica en Utopia : een vastgoedstrategie voor de lange termijn
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Everything as a service
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Climate change is here to stay, so we'd better prepare for it
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The race for sustainability
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Rethinking education
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The position of Europe in the world
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The race for sovereignty
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EU/US white paper on the continuum of computing
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- Book Chapter
- open access
Taming the IT systems complexity hydra
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- Book Chapter
- open access
AI for a better society
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- Book Chapter
- open access
COVID-19 is more than a pandemic
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- Book Chapter
- open access
Rethinking education
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- Book Chapter
- open access
Europe should be the humans-first continent
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- Book Chapter
- open access
The position of Europe in the world
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- Book Chapter
- open access
Is healthcare ready for a digital future?
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- Book Chapter
- open access
Everything as a service
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Effective and efficient Java‐type obfuscation
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- Journal Article
- A1
- open access
Adaptive compiler strategies for mitigating timing side channel attacks
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Past, present and future of the internet and digitally-augmented humanity : a HiPEAC vision
(2020) -
HiPEAC : a European network built to last
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HiPEAC Vision 2019
(2019) -
HiPEAC Vision 2017
(2017) p.1-167 -
Taming parallelism in a multi-variant execution environment
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Calling hardware procedures in a reconfigurable accelerator using RPC-FPGA
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Evaluation of dynamic binary translation techniques for full system virtualisation on ARMv7-A
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- Conference Paper
- P1
- open access
SOFIA : software and control flow integrity architecture
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- Journal Article
- A1
- open access
Link-time smart card code hardening
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HiPEAC vision 2015
(2015) p.1-65 -
Pushing Java type obfuscation to the limit
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A novel obfuscation: class hierarchy flattening
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- Journal Article
- A1
- open access
Protecting your software updates
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- Journal Article
- A1
- open access
Formal virtualization requirements for the ARM architecture
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GHUMVEE: efficient, effective, and flexible replication
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- Miscellaneous
- open access
The HIPEAC vision for advanced computing in horizon 2020
(2013) p.1-48 -
- Conference Paper
- C1
- open access
Mitigating smart card fault injection with link-time code rewriting: a feasibility study
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Efficient calculation of reduced density matrices from Slater determinant expansions
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Introduction to the special issue on high-performance and embedded architectures and compilers
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DNS tunneling for network penetration
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Automatic parallelization in the paralax compiler
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Whole-array SSA: an intermediate representation of memory for trading-off precision against complexity
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Computing sytems: research challenges ahead: the HiPEAC vision 2011/2012
(2011) p.1-53 -
- Miscellaneous
- open access
Computing systems: research challenges ahead: the HiPEAC Vision 2011/ 2012
(2011) p.1-56 -
Compilation and virtualization in the HiPEAC vision
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A profile-based tool for finding pipeline parallelism in sequential programs
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The paralax infrastructure: automatic parallelization with a helping hand
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- Conference Paper
- C1
- open access
Implicit hints : embedding hint bits in programs without ISA changes
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- Miscellaneous
- open access
The Hipeac Vision, 2010
(2010) p.1-60 -
- Conference Paper
- C1
- open access
An experimental study on performance portability of OpenCL kernels
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System-scenario-based design of dynamic embedded systems
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Practical mitigations for timing-based side-channel attacks
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- Conference Paper
- P1
- open access
Linux kernel compaction through cold code swapping
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Accelerating multiple sequence alignment with the cell BE processor
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- Conference Paper
- C1
- open access
Factoring out ordered sections to expose thread-level parallelism
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- Conference Paper
- C1
- open access
Can we apply accelerator-cores to control-intensive programs?
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Towards automatic program partitioning
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Instruction set limitation in support of software diversity
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Towards Tamper Resistant Code Encryption: Practice and Experience
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Detecting the Existence of Coarse-Grain Parallelism in General-Purpose Programs
(2008) p.1-12 -
A Dynamic Analysis Tool for Finding Coarse-Grain Parallelism
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Extracting Coarse-Grain Parallelism in General-Purpose Programs
(2008) p.281-282 -
Upcoming computing system challenges: the HiPEAC vision
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Behavior-based branch prediction by dynamically clustering branch instructions
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Constructing optimal XOR-functions to minimize cache conflict misses
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Experiences with Parallelizing a Bio-informatics Program on the Cell BE
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Memory footprint reduction for embedded systems
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High-Performance Embedded Architecture and Compilation Roadmap
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- Conference Paper
- C1
- open access
Program Obfuscation: A Quantitative Approach
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- Conference Paper
- C1
- open access
Detection of Coarse-grain Parallelism
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- Conference Paper
- C1
- open access
Whole-Program Linear-Constant Analysis with Applications to Link-Time Optimization
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Architecture and Compilers for Embedded Systems (ACES) Symposium Proceedings
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- Conference Paper
- C1
- open access
Detection of Function-level Parallelism
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A practical interprocedural dominance algorithm
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Java object header elimination for reduced memory consumption in 64-bit virtual machines
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Exploiting program phase behavior for energy reduction on multi-configuration processors
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Clustered indexing for branch predictors
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A model for self-modifying code
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Run-time randomization to mitigate tampering
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- Journal Article
- A2
- open access
Function level parallelism driven by data dependencies
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- Journal Article
- A1
- open access
Using HPM-sampling to drive dynamic compilation
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GCH: hints for triggering garbage collections
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Automated reduction of the memory footprint of the Linux kernel
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Link-time compaction and optimization of ARM executables
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Object-relative addressing: Compressed pointers in 64-bit Java virtual machines
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Exploiting video stream similarity for energy-efficient decoding
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- Journal Article
- A1
- open access
On the expressiveness of timed coordination models
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Bidirectional liveness analysis, or how less than half of the Alpha's registers are used
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64-bit versus 32-bit virtual machines for Java
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Yet shorter warmup by combining no-state-loss and MRRL for sampled LRU cache simulation
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Improved composite confidence mechanisms for a perceptron branch predictor
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NSL-BLRL: Efficient cache warm'up for sampled processor simulation
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- Conference Paper
- P1
- open access
Space-efficient 64-bit java objects through selective typed virtual addressing
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- Conference Paper
- P1
- open access
An analysis of program phase behavior and its predictability
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- Conference Paper
- P1
- open access
Understanding obfuscated code
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Energy consumption for transport of control information on a segmented software-controlled communication architecture
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- Conference Paper
- C1
- open access
Function Level Parallelism Lead by Data Dependencies
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- Conference Paper
- C1
- open access
NSL-BLRL: Efficient Cache Warmup for Sampled Processor Simulation
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Identifying Program Phase Transition Points
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- Conference Paper
- C1
- open access
Identifying Program Phase Behavior in Parallel Programs on Distributed Shared-memory Systems
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Automatic Generation of Synthetic Benchmarks
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- Conference Paper
- C1
- open access
Classifying Data Dependencies Between Functions