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A low-noise instrumentation amplifier with built-in anti-aliasing for hall sensors

Robbe Riem (UGent) , Johan Raman (UGent) , Jonas Borgmans (UGent) and Pieter Rombouts (UGent)
(2021) IEEE SENSORS JOURNAL. 21(17). p.18932-18944
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Organization
Abstract
We present a compact, versatile Hall readout system with digital output, fully integrated in 180 nm technology. The core of the system is an instrumentation amplifier architecture that provides inherent anti-aliasing filtering, where the anti-aliasing characteristic is locked into a shape that maximally prevents aliasing to low frequencies. The efficiency for blocking out-of-band white noise is comparable to that of a second-order filter, eliminating the need for an explicit anti-aliasing filter before the ADC. Chopping/spinning is applied for up-modulating offset and 1/f noise to just beyond the signal band. A mostly-digital ripple reduction loop (RRL) is added for mitigating offset-related dynamic range limitations. In this, a bilinear integrator is introduced for eliminating the impact of the RRL on the system's DC gain. Moreover, the resolution of the DAC generating the analog offset compensation is reduced significantly, and the effect thereof is eliminated by digital noise cancellation logic. The one-step amplification and the simple, low-resolution DAC for offset compensation both aid in keeping the area footprint low: the analog circuits (including DAC and ADC) only occupy 0.21 mm(2). Notable performance characteristics are an input-referred noise floor of 55 n/root Hz within a 410 kHz bandwidth, a current consumption of only 5.1 mA, and a 47dB dynamic range. The amplifier architecture can be easily applied as an analog preconditioning circuit in other sensor readout situations as well.
Keywords
FRONT-END, CMOS, READOUT, FEEDBACK, Instrumentation amplifiers, sensor readout, hall sensor, in-the-loop, sampling amplifier (ILSA)

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MLA
Riem, Robbe, et al. “A Low-Noise Instrumentation Amplifier with Built-in Anti-Aliasing for Hall Sensors.” IEEE SENSORS JOURNAL, vol. 21, no. 17, 2021, pp. 18932–44, doi:10.1109/JSEN.2021.3090251.
APA
Riem, R., Raman, J., Borgmans, J., & Rombouts, P. (2021). A low-noise instrumentation amplifier with built-in anti-aliasing for hall sensors. IEEE SENSORS JOURNAL, 21(17), 18932–18944. https://doi.org/10.1109/JSEN.2021.3090251
Chicago author-date
Riem, Robbe, Johan Raman, Jonas Borgmans, and Pieter Rombouts. 2021. “A Low-Noise Instrumentation Amplifier with Built-in Anti-Aliasing for Hall Sensors.” IEEE SENSORS JOURNAL 21 (17): 18932–44. https://doi.org/10.1109/JSEN.2021.3090251.
Chicago author-date (all authors)
Riem, Robbe, Johan Raman, Jonas Borgmans, and Pieter Rombouts. 2021. “A Low-Noise Instrumentation Amplifier with Built-in Anti-Aliasing for Hall Sensors.” IEEE SENSORS JOURNAL 21 (17): 18932–18944. doi:10.1109/JSEN.2021.3090251.
Vancouver
1.
Riem R, Raman J, Borgmans J, Rombouts P. A low-noise instrumentation amplifier with built-in anti-aliasing for hall sensors. IEEE SENSORS JOURNAL. 2021;21(17):18932–44.
IEEE
[1]
R. Riem, J. Raman, J. Borgmans, and P. Rombouts, “A low-noise instrumentation amplifier with built-in anti-aliasing for hall sensors,” IEEE SENSORS JOURNAL, vol. 21, no. 17, pp. 18932–18944, 2021.
@article{8722131,
  abstract     = {{We present a compact, versatile Hall readout system with digital output, fully integrated in 180 nm technology. The core of the system is an instrumentation amplifier architecture that provides inherent anti-aliasing filtering, where the anti-aliasing characteristic is locked into a shape that maximally prevents aliasing to low frequencies. The efficiency for blocking out-of-band white noise is comparable to that of a second-order filter, eliminating the need for an explicit anti-aliasing filter before the ADC. Chopping/spinning is applied for up-modulating offset and 1/f noise to just beyond the signal band. A mostly-digital ripple reduction loop (RRL) is added for mitigating offset-related dynamic range limitations. In this, a bilinear integrator is introduced for eliminating the impact of the RRL on the system's DC gain. Moreover, the resolution of the DAC generating the analog offset compensation is reduced significantly, and the effect thereof is eliminated by digital noise cancellation logic. The one-step amplification and the simple, low-resolution DAC for offset compensation both aid in keeping the area footprint low: the analog circuits (including DAC and ADC) only occupy 0.21 mm(2). Notable performance characteristics are an input-referred noise floor of 55 n/root Hz within a 410 kHz bandwidth, a current consumption of only 5.1 mA, and a 47dB dynamic range. The amplifier architecture can be easily applied as an analog preconditioning circuit in other sensor readout situations as well.}},
  author       = {{Riem, Robbe and Raman, Johan and Borgmans, Jonas and Rombouts, Pieter}},
  issn         = {{1530-437X}},
  journal      = {{IEEE SENSORS JOURNAL}},
  keywords     = {{FRONT-END,CMOS,READOUT,FEEDBACK,Instrumentation amplifiers,sensor readout,hall sensor,in-the-loop,sampling amplifier (ILSA)}},
  language     = {{eng}},
  number       = {{17}},
  pages        = {{18932--18944}},
  title        = {{A low-noise instrumentation amplifier with built-in anti-aliasing for hall sensors}},
  url          = {{http://dx.doi.org/10.1109/JSEN.2021.3090251}},
  volume       = {{21}},
  year         = {{2021}},
}

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