Silicon circuits for chip-to-chip communications in multi-socket server board interconnects
- Author
- Miltiadis Moralis-Pegios, Stelios Pitris, Charoula Mitsolidou, Konstantinos Fotiadis, Hannes Ramon, Joris Lambrecht (UGent) , Johan Bauwelinck (UGent) , Xin Yin (UGent) , Yoojin Ban, Peter De Heyn, Joris Van Campenhout, Tobias Lamprecht, Andreas Lehnman, Nikos Pleros and Theoni Alexoudi
- Organization
- Abstract
- Multi-socket server boards (MSBs) exploit the interconnection of multiple processor chips towards forming powerful cache coherent systems, with the interconnect technology comprising a key element in boosting processing performance. Here, we present an overview of the current electrical interconnects for MSBs, outlining the main challenges currently faced. We propose the use of silicon photonics (SiPho) towards advancing interconnect throughput, socket connectivity and energy efficiency in MSB layouts, enabling a flat-topology wavelength division multiplexing (WDM)-based point-to-point (p2p) optical MSB interconnect scheme. We demonstrate WDM SiPho transceivers (TxRxs) co-assembled with their electronic circuits for up to 50 Gb/s line rate and 400 Gb/s aggregate data transmission and SiPho arrayed waveguide grating routers that can offer collision-less time of flight connectivity for up to 16 nodes. The capacity can scale to 2.8 Gb/s for an eight-socket MSB, when line rate scales to 50 Gb/s, yielding up to 69% energy reduction compared with the QuickPath Interconnect and highlighting the feasibility of single-hop p2p interconnects in MSB systems with >4 sockets.
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Citation
Please use this url to cite or link to this publication: http://hdl.handle.net/1854/LU-8702080
- MLA
- Moralis-Pegios, Miltiadis, et al. “Silicon Circuits for Chip-to-Chip Communications in Multi-Socket Server Board Interconnects.” IET OPTOELECTRONICS, vol. 15, no. 2, 2021, pp. 102–10, doi:10.1049/ote2.12018.
- APA
- Moralis-Pegios, M., Pitris, S., Mitsolidou, C., Fotiadis, K., Ramon, H., Lambrecht, J., … Alexoudi, T. (2021). Silicon circuits for chip-to-chip communications in multi-socket server board interconnects. IET OPTOELECTRONICS, 15(2), 102–110. https://doi.org/10.1049/ote2.12018
- Chicago author-date
- Moralis-Pegios, Miltiadis, Stelios Pitris, Charoula Mitsolidou, Konstantinos Fotiadis, Hannes Ramon, Joris Lambrecht, Johan Bauwelinck, et al. 2021. “Silicon Circuits for Chip-to-Chip Communications in Multi-Socket Server Board Interconnects.” IET OPTOELECTRONICS 15 (2): 102–10. https://doi.org/10.1049/ote2.12018.
- Chicago author-date (all authors)
- Moralis-Pegios, Miltiadis, Stelios Pitris, Charoula Mitsolidou, Konstantinos Fotiadis, Hannes Ramon, Joris Lambrecht, Johan Bauwelinck, Xin Yin, Yoojin Ban, Peter De Heyn, Joris Van Campenhout, Tobias Lamprecht, Andreas Lehnman, Nikos Pleros, and Theoni Alexoudi. 2021. “Silicon Circuits for Chip-to-Chip Communications in Multi-Socket Server Board Interconnects.” IET OPTOELECTRONICS 15 (2): 102–110. doi:10.1049/ote2.12018.
- Vancouver
- 1.Moralis-Pegios M, Pitris S, Mitsolidou C, Fotiadis K, Ramon H, Lambrecht J, et al. Silicon circuits for chip-to-chip communications in multi-socket server board interconnects. IET OPTOELECTRONICS. 2021;15(2):102–10.
- IEEE
- [1]M. Moralis-Pegios et al., “Silicon circuits for chip-to-chip communications in multi-socket server board interconnects,” IET OPTOELECTRONICS, vol. 15, no. 2, pp. 102–110, 2021.
@article{8702080,
abstract = {{Multi-socket server boards (MSBs) exploit the interconnection of multiple processor chips towards forming powerful cache coherent systems, with the interconnect technology comprising a key element in boosting processing performance. Here, we present an overview of the current electrical interconnects for MSBs, outlining the main challenges currently faced. We propose the use of silicon photonics (SiPho) towards advancing interconnect throughput, socket connectivity and energy efficiency in MSB layouts, enabling a flat-topology wavelength division multiplexing (WDM)-based point-to-point (p2p) optical MSB interconnect scheme. We demonstrate WDM SiPho transceivers (TxRxs) co-assembled with their electronic circuits for up to 50 Gb/s line rate and 400 Gb/s aggregate data transmission and SiPho arrayed waveguide grating routers that can offer collision-less time of flight connectivity for up to 16 nodes. The capacity can scale to 2.8 Gb/s for an eight-socket MSB, when line rate scales to 50 Gb/s, yielding up to 69% energy reduction compared with the QuickPath Interconnect and highlighting the feasibility of single-hop p2p interconnects in MSB systems with >4 sockets.}},
author = {{Moralis-Pegios, Miltiadis and Pitris, Stelios and Mitsolidou, Charoula and Fotiadis, Konstantinos and Ramon, Hannes and Lambrecht, Joris and Bauwelinck, Johan and Yin, Xin and Ban, Yoojin and De Heyn, Peter and Van Campenhout, Joris and Lamprecht, Tobias and Lehnman, Andreas and Pleros, Nikos and Alexoudi, Theoni}},
issn = {{1751-8768}},
journal = {{IET OPTOELECTRONICS}},
language = {{eng}},
number = {{2}},
pages = {{102--110}},
title = {{Silicon circuits for chip-to-chip communications in multi-socket server board interconnects}},
url = {{http://doi.org/10.1049/ote2.12018}},
volume = {{15}},
year = {{2021}},
}
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