CRoute: a fast high-quality timing-driven connection-based FPGA router
- Author
- Dries Vercruyce, Elias Vansteenkiste (UGent) and Dirk Stroobandt (UGent)
- Organization
- Project
- Abstract
- FPGA routing is an important part of physical design as the programmable interconnection network requires the majority of the total silicon area and the connections largely contribute to delay and power. It should also occur with minimum runtime to enable efficient design exploration. In this work we elaborate on the concept of the connection-based routing principle. The algorithm is improved and a timing-driven version is introduced. The router, called CROUTE, is implemented in an easy to adapt FPGA CAD framework written in Java, which is publicly available on GitHub. Quality and runtime are compared to the state-of-the-art router in VPR 7.0.7. Benchmarking is done with the TITAN23 design suite, which consists of large heterogeneous designs targeted to a detailed representation of the Stratix IV FPGA. CROUTE gains in both the total wirelength and maximum clock frequency while reducing the routing runtime. The total wire-length reduces by 11% and the maximum clock frequency increases by 6%. These high-quality results are obtained in 3.4x less routing runtime.
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Citation
Please use this url to cite or link to this publication: http://hdl.handle.net/1854/LU-8640095
- MLA
- Vercruyce, Dries, et al. “CRoute: A Fast High-Quality Timing-Driven Connection-Based FPGA Router.” 2019 27TH IEEE ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM), IEEE, 2019, pp. 53–60, doi:10.1109/fccm.2019.00017.
- APA
- Vercruyce, D., Vansteenkiste, E., & Stroobandt, D. (2019). CRoute: a fast high-quality timing-driven connection-based FPGA router. 2019 27TH IEEE ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM), 53–60. https://doi.org/10.1109/fccm.2019.00017
- Chicago author-date
- Vercruyce, Dries, Elias Vansteenkiste, and Dirk Stroobandt. 2019. “CRoute: A Fast High-Quality Timing-Driven Connection-Based FPGA Router.” In 2019 27TH IEEE ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM), 53–60. IEEE. https://doi.org/10.1109/fccm.2019.00017.
- Chicago author-date (all authors)
- Vercruyce, Dries, Elias Vansteenkiste, and Dirk Stroobandt. 2019. “CRoute: A Fast High-Quality Timing-Driven Connection-Based FPGA Router.” In 2019 27TH IEEE ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM), 53–60. IEEE. doi:10.1109/fccm.2019.00017.
- Vancouver
- 1.Vercruyce D, Vansteenkiste E, Stroobandt D. CRoute: a fast high-quality timing-driven connection-based FPGA router. In: 2019 27TH IEEE ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM). IEEE; 2019. p. 53–60.
- IEEE
- [1]D. Vercruyce, E. Vansteenkiste, and D. Stroobandt, “CRoute: a fast high-quality timing-driven connection-based FPGA router,” in 2019 27TH IEEE ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM), San Diego, CA, 2019, pp. 53–60.
@inproceedings{8640095,
abstract = {{FPGA routing is an important part of physical design as the programmable interconnection network requires the majority of the total silicon area and the connections largely contribute to delay and power. It should also occur with minimum runtime to enable efficient design exploration. In this work we elaborate on the concept of the connection-based routing principle. The algorithm is improved and a timing-driven version is introduced. The router, called CROUTE, is implemented in an easy to adapt FPGA CAD framework written in Java, which is publicly available on GitHub. Quality and runtime are compared to the state-of-the-art router in VPR 7.0.7. Benchmarking is done with the TITAN23 design suite, which consists of large heterogeneous designs targeted to a detailed representation of the Stratix IV FPGA. CROUTE gains in both the total wirelength and maximum clock frequency while reducing the routing runtime. The total wire-length reduces by 11% and the maximum clock frequency increases by 6%. These high-quality results are obtained in 3.4x less routing runtime.}},
author = {{Vercruyce, Dries and Vansteenkiste, Elias and Stroobandt, Dirk}},
booktitle = {{2019 27TH IEEE ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM)}},
isbn = {{9781728111315}},
issn = {{2576-2621}},
language = {{eng}},
location = {{San Diego, CA}},
pages = {{53--60}},
publisher = {{IEEE}},
title = {{CRoute: a fast high-quality timing-driven connection-based FPGA router}},
url = {{http://dx.doi.org/10.1109/fccm.2019.00017}},
year = {{2019}},
}
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