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Adaptive patterning of optical and electrical fan-out for photonic chip packaging

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Abstract
Packaging and assembly challenges for photonic chips still need to be addressed in order to enable rapid deployment in mass-market production. Integration and assembly solutions that not only enable ease of packaging but also allow a dense co-integration of the electronic and photonic ICs are essential. In that context, we demonstrate an adaptive patterning of both optical and electrical fan-out for face-up electronic-photonic integration. For the optical fan-out, we developed an approach based on adiabatic optical coupling between single-mode polymer waveguides and silicon waveguides on a silicon photonic chip. The polymer waveguides were directly patterned on the silicon photonic chip by direct-write lithography (DWL). The electrical interconnects between a photonic chip and electronic IC are realized by employing high-speed silver interconnects using aerosol-jet printing (AJP), as a promising alternative for the traditional bond-wires. Furthermore, a direct comparison between the AJP interconnects and the conventional bond-wires is established. Finally, an NRZ optical transmitter has been successfully demonstrated based on the AJP interconnection and clear open eye diagrams were obtained at 56 Gb/s.
Keywords
electronic-photonic integration, packaging, photonic integrated circuits, polymer waveguides, direct-write lithography, adiabatic coupling, electrical interconnects, aerosol-jet printing (AJP), JET PRINTED INTERCONNECTS, TRANSMITTER, DRIVER, LASER

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MLA
Elmogi, Ahmed, et al. “Adaptive Patterning of Optical and Electrical Fan-out for Photonic Chip Packaging.” 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), IEEE, 2019, pp. 1757–63.
APA
Elmogi, A., Desmet, A., Missinne, J., Ramon, H., Lambrecht, J., De Heyn, P., … Van Steenberge, G. (2019). Adaptive patterning of optical and electrical fan-out for photonic chip packaging. In 2019 IEEE 69th Electronic Components and Technology Conference (ECTC) (pp. 1757–1763). NEW YORK: IEEE.
Chicago author-date
Elmogi, Ahmed, Andres Desmet, Jeroen Missinne, Hannes Ramon, Joris Lambrecht, Peter De Heyn, Marianne Pantouvaki, Joris Van Campenhout, Johan Bauwelinck, and Geert Van Steenberge. 2019. “Adaptive Patterning of Optical and Electrical Fan-out for Photonic Chip Packaging.” In 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), 1757–63. NEW YORK: IEEE.
Chicago author-date (all authors)
Elmogi, Ahmed, Andres Desmet, Jeroen Missinne, Hannes Ramon, Joris Lambrecht, Peter De Heyn, Marianne Pantouvaki, Joris Van Campenhout, Johan Bauwelinck, and Geert Van Steenberge. 2019. “Adaptive Patterning of Optical and Electrical Fan-out for Photonic Chip Packaging.” In 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), 1757–1763. NEW YORK: IEEE.
Vancouver
1.
Elmogi A, Desmet A, Missinne J, Ramon H, Lambrecht J, De Heyn P, et al. Adaptive patterning of optical and electrical fan-out for photonic chip packaging. In: 2019 IEEE 69th Electronic Components and Technology Conference (ECTC). NEW YORK: IEEE; 2019. p. 1757–63.
IEEE
[1]
A. Elmogi et al., “Adaptive patterning of optical and electrical fan-out for photonic chip packaging,” in 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), Las Vegas, NV, USA, 2019, pp. 1757–1763.
@inproceedings{8626994,
  abstract     = {Packaging and assembly challenges for photonic chips still need to be addressed in order to enable rapid deployment in mass-market production. Integration and assembly solutions that not only enable ease of packaging but also allow a dense co-integration of the electronic and photonic ICs are essential. In that context, we demonstrate an adaptive patterning of both optical and electrical fan-out for face-up electronic-photonic integration. For the optical fan-out, we developed an approach based on adiabatic optical coupling between single-mode polymer waveguides and silicon waveguides on a silicon photonic chip. The polymer waveguides were directly patterned on the silicon photonic chip by direct-write lithography (DWL). The electrical interconnects between a photonic chip and electronic IC are realized by employing high-speed silver interconnects using aerosol-jet printing (AJP), as a promising alternative for the traditional bond-wires. Furthermore, a direct comparison between the AJP interconnects and the conventional bond-wires is established. Finally, an NRZ optical transmitter has been successfully demonstrated based on the AJP interconnection and clear open eye diagrams were obtained at 56 Gb/s.},
  author       = {Elmogi, Ahmed and Desmet, Andres and Missinne, Jeroen and Ramon, Hannes and Lambrecht, Joris and De Heyn, Peter and Pantouvaki, Marianne and Van Campenhout, Joris and Bauwelinck, Johan and Van Steenberge, Geert},
  booktitle    = {2019 IEEE 69th Electronic Components and Technology Conference (ECTC)},
  isbn         = {9781728114989},
  issn         = {0569-5503},
  keywords     = {electronic-photonic integration,packaging,photonic integrated circuits,polymer waveguides,direct-write lithography,adiabatic coupling,electrical interconnects,aerosol-jet printing (AJP),JET PRINTED INTERCONNECTS,TRANSMITTER,DRIVER,LASER},
  language     = {eng},
  location     = {Las Vegas, NV, USA},
  pages        = {1757--1763},
  publisher    = {IEEE},
  title        = {Adaptive patterning of optical and electrical fan-out for photonic chip packaging},
  url          = {http://dx.doi.org/10.1109/ECTC.2019.00269},
  year         = {2019},
}

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