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Deep levels in metal-oxide-semiconductor capacitors fabricated on n-type In0.53Ga0.47As lattice matched to InP substrates

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Abstract
In this work, deep levels present in n-type In0.53Ga0.47As hetero-epitaxial layers grown lattice-matched on n-type InP substrates by molecular beam epitaxy have been studied by deep-level transient spectroscopy (DLTS). Metal–oxide–semiconductor capacitors are employed, based on an Al2O3 gate oxide. It is shown that a single, near mid-gap electron trap dominates the DLT-spectra, whatever the surface pre-or post-gate oxide deposition treatment. At the same time, it is shown that the deep level parameters vary significantly from capacitor to capacitor and from wafer to wafer. Only after Forming Gas Annealing, a stable value for the activation energy of 0.39 ± 0.01 eV is obtained. These results are tentatively interpreted in terms of antisite defects in the epitaxial layer, which form a family of related complexes with close deep-level parameters.
Keywords
DLTS, InGaAs, MOS capacitor, antisite defects, TRANSIENT SPECTROSCOPY, INTERFACE STATES, III-V, CONSTANT-CAPACITANCE, SI-SIO2 STRUCTURES, TRAPS, EL2, DEFECTS, RELAXATION, EMISSION

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Citation

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MLA
Simoen, Eddy, et al. “Deep Levels in Metal-Oxide-Semiconductor Capacitors Fabricated on n-Type In0.53Ga0.47As Lattice Matched to InP Substrates.” SEMICONDUCTOR SCIENCE AND TECHNOLOGY, vol. 34, no. 7, 2019.
APA
Simoen, E., Hsu, P.-C. (Brent), Alian, A., El Kazzi, S., & Wang, C. (2019). Deep levels in metal-oxide-semiconductor capacitors fabricated on n-type In0.53Ga0.47As lattice matched to InP substrates. SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 34(7).
Chicago author-date
Simoen, Eddy, Po-Chun (Brent) Hsu, A Alian, S El Kazzi, and C Wang. 2019. “Deep Levels in Metal-Oxide-Semiconductor Capacitors Fabricated on n-Type In0.53Ga0.47As Lattice Matched to InP Substrates.” SEMICONDUCTOR SCIENCE AND TECHNOLOGY 34 (7).
Chicago author-date (all authors)
Simoen, Eddy, Po-Chun (Brent) Hsu, A Alian, S El Kazzi, and C Wang. 2019. “Deep Levels in Metal-Oxide-Semiconductor Capacitors Fabricated on n-Type In0.53Ga0.47As Lattice Matched to InP Substrates.” SEMICONDUCTOR SCIENCE AND TECHNOLOGY 34 (7).
Vancouver
1.
Simoen E, Hsu P-C (Brent), Alian A, El Kazzi S, Wang C. Deep levels in metal-oxide-semiconductor capacitors fabricated on n-type In0.53Ga0.47As lattice matched to InP substrates. SEMICONDUCTOR SCIENCE AND TECHNOLOGY. 2019;34(7).
IEEE
[1]
E. Simoen, P.-C. (Brent) Hsu, A. Alian, S. El Kazzi, and C. Wang, “Deep levels in metal-oxide-semiconductor capacitors fabricated on n-type In0.53Ga0.47As lattice matched to InP substrates,” SEMICONDUCTOR SCIENCE AND TECHNOLOGY, vol. 34, no. 7, 2019.
@article{8620564,
  abstract     = {In this work, deep levels present in n-type In0.53Ga0.47As hetero-epitaxial layers grown lattice-matched on n-type InP substrates by molecular beam epitaxy have been studied by deep-level transient spectroscopy (DLTS). Metal–oxide–semiconductor capacitors are employed, based on an Al2O3 gate oxide. It is shown that a single, near mid-gap electron trap dominates the DLT-spectra, whatever the surface pre-or post-gate oxide deposition treatment. At the same time, it is shown that the deep level parameters vary significantly from capacitor to capacitor and from wafer to wafer. Only after Forming Gas Annealing, a stable value for the activation energy of 0.39 ± 0.01 eV is obtained. These results are tentatively interpreted in terms of antisite defects in the epitaxial layer, which form a family of related complexes with close deep-level parameters.},
  articleno    = {075024},
  author       = {Simoen, Eddy and Hsu, Po-Chun (Brent) and Alian, A and El Kazzi, S and Wang, C},
  issn         = {0268-1242},
  journal      = {SEMICONDUCTOR SCIENCE AND TECHNOLOGY},
  keywords     = {DLTS,InGaAs,MOS capacitor,antisite defects,TRANSIENT SPECTROSCOPY,INTERFACE STATES,III-V,CONSTANT-CAPACITANCE,SI-SIO2 STRUCTURES,TRAPS,EL2,DEFECTS,RELAXATION,EMISSION},
  language     = {eng},
  number       = {7},
  pages        = {7},
  title        = {Deep levels in metal-oxide-semiconductor capacitors fabricated on n-type In0.53Ga0.47As lattice matched to InP substrates},
  url          = {http://dx.doi.org/10.1088/1361-6641/ab2481},
  volume       = {34},
  year         = {2019},
}

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