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Low-Frequency Noise Assessment of Work Function Engineering Cap Layers in High-k Gate Stacks

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Abstract
the gate stack. Typical cap layers are Al2O3 for pMOSFETs and La-oxide or Mg for nMOSFETs. Besides introducing a dipole layer at the SiO2/high-kappa interface, the in-diffusion of the metal ions may lead to either passivation or generation of traps in the SiO2/high-kappa layer. This paper uses low frequency noise studies to determine the impact of capping layers on the quality of the SiO2/HfO2 gate stacks. The influence on the trap profiles of different types of cap layers, different locations of the cap layer (below or on top of the HfO2 dielectric) and the impact of different thermal budgets, typically used for the fabrication of Dynamic Random Access Memory (DRAM) logic devices, are investigated. The differences between several metal oxides are outlined and discussed.
Keywords
DEVICE PERFORMANCE, IMPACT, METAL, RELIABILITY, MOSFETS, STATES

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Please use this url to cite or link to this publication:

Chicago
Claeys, Cor, Romain Ritzenthaler, T. Schram, H. Arimura, N. Horiguchi, and Eddy Simoen. 2019. “Low-Frequency Noise Assessment of Work Function Engineering Cap Layers in High-k Gate Stacks.” Ecs Journal of Solid State Science and Technology 8 (2): N25–N31.
APA
Claeys, Cor, Ritzenthaler, R., Schram, T., Arimura, H., Horiguchi, N., & Simoen, E. (2019). Low-Frequency Noise Assessment of Work Function Engineering Cap Layers in High-k Gate Stacks. ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, 8(2), N25–N31.
Vancouver
1.
Claeys C, Ritzenthaler R, Schram T, Arimura H, Horiguchi N, Simoen E. Low-Frequency Noise Assessment of Work Function Engineering Cap Layers in High-k Gate Stacks. ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY. 65 SOUTH MAIN STREET, PENNINGTON, NJ 08534, USA: ELECTROCHEMICAL SOC INC; 2019;8(2):N25–N31.
MLA
Claeys, Cor et al. “Low-Frequency Noise Assessment of Work Function Engineering Cap Layers in High-k Gate Stacks.” ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY 8.2 (2019): N25–N31. Print.
@article{8619877,
  abstract     = {the gate stack. Typical cap layers are Al2O3 for pMOSFETs and La-oxide or Mg for nMOSFETs. Besides introducing a dipole layer at the SiO2/high-kappa interface, the in-diffusion of the metal ions may lead to either passivation or generation of traps in the SiO2/high-kappa layer. This paper uses low frequency noise studies to determine the impact of capping layers on the quality of the SiO2/HfO2 gate stacks. The influence on the trap profiles of different types of cap layers, different locations of the cap layer (below or on top of the HfO2 dielectric) and the impact of different thermal budgets, typically used for the fabrication of Dynamic Random Access Memory (DRAM) logic devices, are investigated. The differences between several metal oxides are outlined and discussed.},
  author       = {Claeys, Cor and Ritzenthaler, Romain and Schram, T. and Arimura, H. and Horiguchi, N. and Simoen, Eddy},
  issn         = {2162-8769},
  journal      = {ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY},
  keywords     = {DEVICE PERFORMANCE,IMPACT,METAL,RELIABILITY,MOSFETS,STATES},
  language     = {eng},
  number       = {2},
  pages        = {N25--N31},
  publisher    = {ELECTROCHEMICAL SOC INC},
  title        = {Low-Frequency Noise Assessment of Work Function Engineering Cap Layers in High-k Gate Stacks},
  url          = {http://dx.doi.org/10.1149/2.0221902jss},
  volume       = {8},
  year         = {2019},
}

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