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Alignment-tolerant interfacing of a photonic integrated circuit using back side etched silicon microlenses

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Abstract
Directly interfacing a photonic integrated circuit allows at best an alignment tolerance of a few micrometer due to the small dimensions of optical (coupling) features on chip, but when using microlenses integrated on the substrate-side, alignment tolerances for interfacing the chips can greatly be relaxed. This is demonstrated on a 750 μm thick chip with standard grating couplers (operation wavelength around 1550 nm). Low roughness silicon microlenses were realized by transferring reflowed photoresist into the silicon substrate using reactive ion etching. The microlens allows interfacing the chip from the backside with an expanded beam, drastically increasing lateral alignment tolerances. A 1 dB alignment tolerance of ±8 μm and ±11 μm (along and perpendicular to the grating coupler direction, respectively) was experimentally found when a 40 μm mode field diameter beam was used at the input.
Keywords
back side, photonic integrated circuit, silicon microlens, tolerant alignment

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MLA
Missinne, Jeroen, et al. “Alignment-Tolerant Interfacing of a Photonic Integrated Circuit Using Back Side Etched Silicon Microlenses.” SILICON PHOTONICS XIV, edited by Graham T. Reed and Andrew P. Knights, vol. 10923, SPIE, 2019.
APA
Missinne, J., Teigell Beneitez, N., Mangal, N., Zhang, J., Vasiliev, A., Van Campenhout, J., … Van Steenberge, G. (2019). Alignment-tolerant interfacing of a photonic integrated circuit using back side etched silicon microlenses. In G. T. Reed & A. P. Knights (Eds.), SILICON PHOTONICS XIV (Vol. 10923). San Francisco: SPIE.
Chicago author-date
Missinne, Jeroen, Nuria Teigell Beneitez, Nivesh Mangal, Jing Zhang, Anton Vasiliev, Joris Van Campenhout, Bradley Snyder, Günther Roelkens, and Geert Van Steenberge. 2019. “Alignment-Tolerant Interfacing of a Photonic Integrated Circuit Using Back Side Etched Silicon Microlenses.” In SILICON PHOTONICS XIV, edited by Graham T. Reed and Andrew P. Knights. Vol. 10923. SPIE.
Chicago author-date (all authors)
Missinne, Jeroen, Nuria Teigell Beneitez, Nivesh Mangal, Jing Zhang, Anton Vasiliev, Joris Van Campenhout, Bradley Snyder, Günther Roelkens, and Geert Van Steenberge. 2019. “Alignment-Tolerant Interfacing of a Photonic Integrated Circuit Using Back Side Etched Silicon Microlenses.” In SILICON PHOTONICS XIV, ed by. Graham T. Reed and Andrew P. Knights. Vol. 10923. SPIE.
Vancouver
1.
Missinne J, Teigell Beneitez N, Mangal N, Zhang J, Vasiliev A, Van Campenhout J, et al. Alignment-tolerant interfacing of a photonic integrated circuit using back side etched silicon microlenses. In: Reed GT, Knights AP, editors. SILICON PHOTONICS XIV. SPIE; 2019.
IEEE
[1]
J. Missinne et al., “Alignment-tolerant interfacing of a photonic integrated circuit using back side etched silicon microlenses,” in SILICON PHOTONICS XIV, San Francisco, 2019, vol. 10923.
@inproceedings{8611714,
  abstract     = {Directly interfacing a photonic integrated circuit allows at best an alignment tolerance of a few micrometer due to the small dimensions of optical (coupling) features on chip, but when using microlenses integrated on the substrate-side, alignment tolerances for interfacing the chips can greatly be relaxed. This is demonstrated on a 750 μm thick chip with standard grating couplers (operation wavelength around 1550 nm). Low roughness silicon microlenses were realized by transferring reflowed photoresist into the silicon substrate using reactive ion etching. The microlens allows interfacing the chip from the backside with an expanded beam, drastically increasing lateral alignment tolerances. A 1 dB alignment tolerance of ±8 μm and ±11 μm (along and perpendicular to the grating coupler direction, respectively) was experimentally found when a 40 μm mode field diameter beam was used at the input.},
  articleno    = {1092304},
  author       = {Missinne, Jeroen and Teigell Beneitez, Nuria and Mangal, Nivesh and Zhang, Jing and Vasiliev, Anton and Van Campenhout, Joris and Snyder, Bradley and Roelkens, Günther and Van Steenberge, Geert},
  booktitle    = {SILICON PHOTONICS XIV},
  editor       = {Reed, Graham T. and Knights, Andrew P.},
  isbn         = {9781510624894},
  issn         = {0277-786X},
  keywords     = {back side,photonic integrated circuit,silicon microlens,tolerant alignment},
  language     = {eng},
  location     = {San Francisco},
  pages        = {7},
  publisher    = {SPIE},
  title        = {Alignment-tolerant interfacing of a photonic integrated circuit using back side etched silicon microlenses},
  url          = {http://dx.doi.org/10.1117/12.2506159},
  volume       = {10923},
  year         = {2019},
}

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