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A 40 Gb/s chip-to-chip interconnect for 8-socket direct connectivity using integrated photonics

(2018) IEEE PHOTONICS JOURNAL. 10(5). p.1-9
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Abstract
We present an O-band any-to-any chip-to-chip (C2C) interconnection at 40 Gb/s suitable for up to 8-socket direct connectivity in multi-socket server boards, utilizing integrated low-energy photonics for the transceiver and routing functions. The C2C interconnect exploits an Si-based ring modulator as its transmitter and a co-packaged photodiode/transimpedance amplifier enabled receiver interconnected over an 8 x 8 Si-based arrayed waveguide grating router, allowing for a single-hop flat-topology interconnection between eight nodes. A proof-of-concept demonstration of the C2C interconnect is presented at 25 and 40 Gb/s for eight possible routing scenarios, revealing clear eye diagrams at both data rates with extinction ratios of 4.8 +/- 0.3 and 4.38 +/- 0.31 dB, respectively, among the eight routed signals.
Keywords
LOW-CROSSTALK, CMOS, ROUTER, Optical interconnections, Wavelength routing, Silicon photonics, Photonic integrated circuits

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Citation

Please use this url to cite or link to this publication:

MLA
Pitris, Stelios, et al. “A 40 Gb/s Chip-to-Chip Interconnect for 8-Socket Direct Connectivity Using Integrated Photonics.” IEEE PHOTONICS JOURNAL, vol. 10, no. 5, Ieee-inst Electrical Electronics Engineers Inc, 2018, pp. 1–9, doi:10.1109/JPHOT.2018.2873673.
APA
Pitris, S., Moralis-Pegios, M., Alexoudi, T., Lambrecht, J., Yin, X., Bauwelinck, J., … Pleros, N. (2018). A 40 Gb/s chip-to-chip interconnect for 8-socket direct connectivity using integrated photonics. IEEE PHOTONICS JOURNAL, 10(5), 1–9. https://doi.org/10.1109/JPHOT.2018.2873673
Chicago author-date
Pitris, Stelios, Miltiadis Moralis-Pegios, Theonitsa Alexoudi, Joris Lambrecht, Xin Yin, Johan Bauwelinck, Yoojin Ban, et al. 2018. “A 40 Gb/s Chip-to-Chip Interconnect for 8-Socket Direct Connectivity Using Integrated Photonics.” IEEE PHOTONICS JOURNAL 10 (5): 1–9. https://doi.org/10.1109/JPHOT.2018.2873673.
Chicago author-date (all authors)
Pitris, Stelios, Miltiadis Moralis-Pegios, Theonitsa Alexoudi, Joris Lambrecht, Xin Yin, Johan Bauwelinck, Yoojin Ban, Peter De Heyn, Marianna Pantouvaki, Joris Van Campenhout, Ronald Broeke, and Nikos Pleros. 2018. “A 40 Gb/s Chip-to-Chip Interconnect for 8-Socket Direct Connectivity Using Integrated Photonics.” IEEE PHOTONICS JOURNAL 10 (5): 1–9. doi:10.1109/JPHOT.2018.2873673.
Vancouver
1.
Pitris S, Moralis-Pegios M, Alexoudi T, Lambrecht J, Yin X, Bauwelinck J, et al. A 40 Gb/s chip-to-chip interconnect for 8-socket direct connectivity using integrated photonics. IEEE PHOTONICS JOURNAL. 2018;10(5):1–9.
IEEE
[1]
S. Pitris et al., “A 40 Gb/s chip-to-chip interconnect for 8-socket direct connectivity using integrated photonics,” IEEE PHOTONICS JOURNAL, vol. 10, no. 5, pp. 1–9, 2018.
@article{8580165,
  abstract     = {{We present an O-band any-to-any chip-to-chip (C2C) interconnection at 40 Gb/s suitable for up to 8-socket direct connectivity in multi-socket server boards, utilizing integrated low-energy photonics for the transceiver and routing functions. The C2C interconnect exploits an Si-based ring modulator as its transmitter and a co-packaged photodiode/transimpedance amplifier enabled receiver interconnected over an 8 x 8 Si-based arrayed waveguide grating router, allowing for a single-hop flat-topology interconnection between eight nodes. A proof-of-concept demonstration of the C2C interconnect is presented at 25 and 40 Gb/s for eight possible routing scenarios, revealing clear eye diagrams at both data rates with extinction ratios of 4.8 +/- 0.3 and 4.38 +/- 0.31 dB, respectively, among the eight routed signals.}},
  articleno    = {{6601808}},
  author       = {{Pitris, Stelios and Moralis-Pegios, Miltiadis and Alexoudi, Theonitsa and Lambrecht, Joris and Yin, Xin and Bauwelinck, Johan and Ban, Yoojin and De Heyn, Peter and Pantouvaki, Marianna and Van Campenhout, Joris and Broeke, Ronald and Pleros, Nikos}},
  issn         = {{1943-0655}},
  journal      = {{IEEE PHOTONICS JOURNAL}},
  keywords     = {{LOW-CROSSTALK,CMOS,ROUTER,Optical interconnections,Wavelength routing,Silicon photonics,Photonic integrated circuits}},
  language     = {{eng}},
  number       = {{5}},
  pages        = {{6601808:1--6601808:9}},
  publisher    = {{Ieee-inst Electrical Electronics Engineers Inc}},
  title        = {{A 40 Gb/s chip-to-chip interconnect for 8-socket direct connectivity using integrated photonics}},
  url          = {{http://dx.doi.org/10.1109/JPHOT.2018.2873673}},
  volume       = {{10}},
  year         = {{2018}},
}

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