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Calling hardware procedures in a reconfigurable accelerator using RPC-FPGA

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remote procedure call, high-level synthesis, protocol compiler, FPGA accelerator

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Citation

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Chicago
D’Hollander, Erik, Bruno Chevalier, and Koen De Bosschere. 2017. “Calling Hardware Procedures in a Reconfigurable Accelerator Using RPC-FPGA.” In 2017 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY (ICFPT) , ed. Paul Becket, Ken Eguro, and David Boland, 271–274. Melbourne, Australia: IEEE.
APA
D’Hollander, E., Chevalier, B., & De Bosschere, K. (2017). Calling hardware procedures in a reconfigurable accelerator using RPC-FPGA. In P. Becket, K. Eguro, & D. Boland (Eds.), 2017 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY (ICFPT) (pp. 271–274). Presented at the 16th IEEE International Conference on Field-Programmable Technology (ICFPT) , Melbourne, Australia: IEEE.
Vancouver
1.
D’Hollander E, Chevalier B, De Bosschere K. Calling hardware procedures in a reconfigurable accelerator using RPC-FPGA. In: Becket P, Eguro K, Boland D, editors. 2017 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY (ICFPT) . Melbourne, Australia: IEEE; 2017. p. 271–4.
MLA
D’Hollander, Erik, Bruno Chevalier, and Koen De Bosschere. “Calling Hardware Procedures in a Reconfigurable Accelerator Using RPC-FPGA.” 2017 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY (ICFPT) . Ed. Paul Becket, Ken Eguro, & David Boland. Melbourne, Australia: IEEE, 2017. 271–274. Print.
@inproceedings{8551074,
  author       = {D'Hollander, Erik and Chevalier, Bruno  and De Bosschere, Koen},
  booktitle    = {2017 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE TECHNOLOGY (ICFPT) },
  editor       = {Becket, Paul and Eguro, Ken and Boland, David},
  isbn         = {978-1-5386-2656-6},
  keyword      = {remote procedure call,high-level synthesis,protocol compiler,FPGA accelerator},
  language     = {eng},
  location     = {Melbourne, Australia},
  pages        = {271--274},
  publisher    = {IEEE},
  title        = {Calling hardware procedures in a reconfigurable accelerator using RPC-FPGA},
  url          = {http://dx.doi.org/10.1109/FPT.2017.8280158},
  year         = {2017},
}

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