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Reliability to soft errors is an increasingly important issue as technology continues to shrink. In this paper, we show that applications exhibit different reliability characteristics on big, high-performance cores versus small, power-efficient cores, and that there is significant opportunity to improve system reliability through reliability-aware scheduling on heterogeneous multicore processors. We monitor the reliability characteristics of all running applications, and dynamically schedule applications to the different core types in a heterogeneous multicore to maximize system reliability. Reliabilityaware scheduling improves reliability by 25.4% on average (and up to 60.2%) compared to performance-optimized scheduling on a heterogeneous multicore processor with two big cores and two small cores, while degrading performance by 6.3% only. We also introduce a novel system-level reliability metric for multiprogram workloads on (heterogeneous) multicores. We further show that our reliability-aware scheduler is robust across core count, number of big and small cores, and their frequency settings. The hardware cost in support of our reliability-aware scheduler is limited to 296 bytes per core.
Keywords
ARCHITECTURAL VULNERABILITY FACTOR, SOFT ERRORS, PERFORMANCE, CORE

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Citation

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Chicago
Naithani, Ajeya, Stijn Eyerman, and Lieven Eeckhout. 2017. “Reliability-aware Scheduling on Heterogeneous Multicore Processors.” In 2017 23RD IEEE INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE (HPCA), 397–408. New york: Ieee.
APA
Naithani, A., Eyerman, S., & Eeckhout, L. (2017). Reliability-aware scheduling on heterogeneous multicore processors. 2017 23RD IEEE INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE (HPCA) (pp. 397–408). Presented at the 23rd IEEE International Symposium on High Performance Computer Architecture (HPCA), New york: Ieee.
Vancouver
1.
Naithani A, Eyerman S, Eeckhout L. Reliability-aware scheduling on heterogeneous multicore processors. 2017 23RD IEEE INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE (HPCA). New york: Ieee; 2017. p. 397–408.
MLA
Naithani, Ajeya, Stijn Eyerman, and Lieven Eeckhout. “Reliability-aware Scheduling on Heterogeneous Multicore Processors.” 2017 23RD IEEE INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE (HPCA). New york: Ieee, 2017. 397–408. Print.
@inproceedings{8542513,
  abstract     = {Reliability to soft errors is an increasingly important issue as technology continues to shrink. In this paper, we show that applications exhibit different reliability characteristics on big, high-performance cores versus small, power-efficient cores, and that there is significant opportunity to improve system reliability through reliability-aware scheduling on heterogeneous multicore processors. We monitor the reliability characteristics of all running applications, and dynamically schedule applications to the different core types in a heterogeneous multicore to maximize system reliability. Reliabilityaware scheduling improves reliability by 25.4% on average (and up to 60.2%) compared to performance-optimized scheduling on a heterogeneous multicore processor with two big cores and two small cores, while degrading performance by 6.3% only. We also introduce a novel system-level reliability metric for multiprogram workloads on (heterogeneous) multicores. We further show that our reliability-aware scheduler is robust across core count, number of big and small cores, and their frequency settings. The hardware cost in support of our reliability-aware scheduler is limited to 296 bytes per core.},
  author       = {Naithani, Ajeya and Eyerman, Stijn and Eeckhout, Lieven},
  booktitle    = {2017 23RD IEEE INTERNATIONAL SYMPOSIUM ON HIGH PERFORMANCE COMPUTER ARCHITECTURE (HPCA)},
  isbn         = {978-1-5090-4985-1},
  issn         = {1530-0897},
  keywords     = {ARCHITECTURAL VULNERABILITY FACTOR,SOFT ERRORS,PERFORMANCE,CORE},
  language     = {eng},
  location     = {Austin, TX},
  pages        = {397--408},
  publisher    = {Ieee},
  title        = {Reliability-aware scheduling on heterogeneous multicore processors},
  url          = {http://dx.doi.org/10.1109/HPCA.2017.12},
  year         = {2017},
}

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