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SICTA : a superimposed in-circuit fault tolerant architecture for SRAM-based FPGAs

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  • EXTRA (Exploiting eXascale Technology with Reconfigurable Architectures)
Abstract
Reassuring fault tolerance in computing systems that contain FPGA devices is the most important problem for mission critical space components. With the rise in interest of commercial SRAM-based FPGAs, it is crucial to provide runtime reconfigurable recovery from a failure. In this paper, we propose a superimposed virtual coarse-grained reconfigurable architecture, embedded with on-demand three level fault-mitigation technique. The proposed method performs run-time recovery via discrete microscrubbing. This approach can provide up to 3× faster runtime recovery with 10.2× less resources in FPGA devices, by providing integrated layers of fault mitigation.
Keywords
FPGA, Fault-tolerance, Parameterised configuration, Radiation-hardening, Scrubbing, TMR.

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Citation

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MLA
Kourfali, Alexandra, Amit Kulkarni, and Dirk Stroobandt. “SICTA : a Superimposed In-circuit Fault Tolerant Architecture for SRAM-based FPGAs.” Proceedings of the IEEE 23rd International Symposium on On-Line Testing and Robust System Design. Thessaloniki: IEEE, 2017. Print.
APA
Kourfali, A., Kulkarni, A., & Stroobandt, D. (2017). SICTA : a superimposed in-circuit fault tolerant architecture for SRAM-based FPGAs. Proceedings of the IEEE 23rd International Symposium on On-Line Testing and Robust System Design. Presented at the 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS), Thessaloniki: IEEE.
Chicago author-date
Kourfali, Alexandra, Amit Kulkarni, and Dirk Stroobandt. 2017. “SICTA : a Superimposed In-circuit Fault Tolerant Architecture for SRAM-based FPGAs.” In Proceedings of the IEEE 23rd International Symposium on On-Line Testing and Robust System Design. Thessaloniki: IEEE.
Chicago author-date (all authors)
Kourfali, Alexandra, Amit Kulkarni, and Dirk Stroobandt. 2017. “SICTA : a Superimposed In-circuit Fault Tolerant Architecture for SRAM-based FPGAs.” In Proceedings of the IEEE 23rd International Symposium on On-Line Testing and Robust System Design. Thessaloniki: IEEE.
Vancouver
1.
Kourfali A, Kulkarni A, Stroobandt D. SICTA : a superimposed in-circuit fault tolerant architecture for SRAM-based FPGAs. Proceedings of the IEEE 23rd International Symposium on On-Line Testing and Robust System Design. Thessaloniki: IEEE; 2017.
IEEE
[1]
A. Kourfali, A. Kulkarni, and D. Stroobandt, “SICTA : a superimposed in-circuit fault tolerant architecture for SRAM-based FPGAs,” in Proceedings of the IEEE 23rd International Symposium on On-Line Testing and Robust System Design, Thessaloniki, 2017.
@inproceedings{8527652,
  abstract     = {{Reassuring fault tolerance in computing systems that contain FPGA devices is the most important problem for mission critical space components. With the rise in interest of commercial SRAM-based FPGAs, it is crucial to provide runtime reconfigurable recovery from a failure. In this paper, we propose a superimposed virtual coarse-grained reconfigurable architecture, embedded with on-demand three level fault-mitigation technique. The proposed method performs run-time recovery via discrete microscrubbing. This approach can provide up to 3× faster runtime recovery with 10.2× less resources in FPGA devices, by providing integrated layers of fault mitigation.}},
  author       = {{Kourfali, Alexandra and Kulkarni, Amit and Stroobandt, Dirk}},
  booktitle    = {{Proceedings of the IEEE 23rd International Symposium on On-Line Testing and Robust System Design}},
  isbn         = {{978-1-5386-0352-9/17}},
  keywords     = {{FPGA,Fault-tolerance,Parameterised configuration,Radiation-hardening,Scrubbing,TMR.}},
  language     = {{eng}},
  location     = {{Thessaloniki}},
  pages        = {{4}},
  publisher    = {{IEEE}},
  title        = {{SICTA : a superimposed in-circuit fault tolerant architecture for SRAM-based FPGAs}},
  year         = {{2017}},
}