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A 40 MHz-BW 12-bit continuous-time a dagger I pound modulator with digital calibration and 84.2 dB-SFDR in 90 nm CMOS

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Abstract
A 4th-order 40 MHz-BW 12-bit continuous-time delta-sigma modulator with digital calibration is presented. A cost-efficient current-shaping technique for the SC DAC is proposed to relax the OTA slewing requirement. The DAC static and dynamic mismatches are eliminated by a look-up table based digital calibration. With a 1.2 V power supply and a 960 MHz clock, 73.6 dB peak SNR and 76.3 dB DR are measured for a 40 MHz bandwidth. After calibration, the modulator achieves an excellent SFDR of 84.2 dB and a 72.9 dB peak SNDR, with IM3 better than 85 dB. The modulator consumes 69.6 mW power, and occupies 0.28 mm(2) area in 90 nm CMOS.
Keywords
Shaped SC DAC, LUT-based Calibration, Doublet, CT DSM, DAC, SIGMA-DELTA MODULATOR, BAND, SIGNAL BANDWIDTH, DYNAMIC-RANGE, QUANTIZER, ERRORS, ADC

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MLA
Xing, Xinpeng, et al. “A 40 MHz-BW 12-Bit Continuous-Time a Dagger I Pound Modulator with Digital Calibration and 84.2 DB-SFDR in 90 Nm CMOS.” ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, vol. 84, no. 1, Springer Verlag, 2015, pp. 137–48, doi:10.1007/s10470-015-0561-8.
APA
Xing, X., De Bock, M., Rombouts, P., & Gielen, G. (2015). A 40 MHz-BW 12-bit continuous-time a dagger I pound modulator with digital calibration and 84.2 dB-SFDR in 90 nm CMOS. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 84(1), 137–148. https://doi.org/10.1007/s10470-015-0561-8
Chicago author-date
Xing, Xinpeng, Maarten De Bock, Pieter Rombouts, and Georges Gielen. 2015. “A 40 MHz-BW 12-Bit Continuous-Time a Dagger I Pound Modulator with Digital Calibration and 84.2 DB-SFDR in 90 Nm CMOS.” ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING 84 (1): 137–48. https://doi.org/10.1007/s10470-015-0561-8.
Chicago author-date (all authors)
Xing, Xinpeng, Maarten De Bock, Pieter Rombouts, and Georges Gielen. 2015. “A 40 MHz-BW 12-Bit Continuous-Time a Dagger I Pound Modulator with Digital Calibration and 84.2 DB-SFDR in 90 Nm CMOS.” ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING 84 (1): 137–148. doi:10.1007/s10470-015-0561-8.
Vancouver
1.
Xing X, De Bock M, Rombouts P, Gielen G. A 40 MHz-BW 12-bit continuous-time a dagger I pound modulator with digital calibration and 84.2 dB-SFDR in 90 nm CMOS. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING. 2015;84(1):137–48.
IEEE
[1]
X. Xing, M. De Bock, P. Rombouts, and G. Gielen, “A 40 MHz-BW 12-bit continuous-time a dagger I pound modulator with digital calibration and 84.2 dB-SFDR in 90 nm CMOS,” ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, vol. 84, no. 1, pp. 137–148, 2015.
@article{6871487,
  abstract     = {{A 4th-order 40 MHz-BW 12-bit continuous-time delta-sigma modulator with digital calibration is presented. A cost-efficient current-shaping technique for the SC DAC is proposed to relax the OTA slewing requirement. The DAC static and dynamic mismatches are eliminated by a look-up table based digital calibration. With a 1.2 V power supply and a 960 MHz clock, 73.6 dB peak SNR and 76.3 dB DR are measured for a 40 MHz bandwidth. After calibration, the modulator achieves an excellent SFDR of 84.2 dB and a 72.9 dB peak SNDR, with IM3 better than 85 dB. The modulator consumes 69.6 mW power, and occupies 0.28 mm(2) area in 90 nm CMOS.}},
  author       = {{Xing, Xinpeng and De Bock, Maarten and Rombouts, Pieter and Gielen, Georges}},
  issn         = {{0925-1030}},
  journal      = {{ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING}},
  keywords     = {{Shaped SC DAC,LUT-based Calibration,Doublet,CT DSM,DAC,SIGMA-DELTA MODULATOR,BAND,SIGNAL BANDWIDTH,DYNAMIC-RANGE,QUANTIZER,ERRORS,ADC}},
  language     = {{eng}},
  number       = {{1}},
  pages        = {{137--148}},
  publisher    = {{Springer Verlag}},
  title        = {{A 40 MHz-BW 12-bit continuous-time a dagger I pound modulator with digital calibration and 84.2 dB-SFDR in 90 nm CMOS}},
  url          = {{http://doi.org/10.1007/s10470-015-0561-8}},
  volume       = {{84}},
  year         = {{2015}},
}

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