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Micro-architecture independent analytical processor performance and power modeling

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Abstract
Optimizing processors for specific application(s) can substantially improve energy-efficiency. With the end of Dennard scaling, and the corresponding reduction in energyefficiency gains from technology scaling, such approaches may become increasingly important. However, designing applicationspecific processors require fast design space exploration tools to optimize for the targeted application(s). Analytical models can be a good fit for such design space exploration as they provide fast performance estimations and insight into the interaction between an application’s characteristics and the micro-architecture of a processor. Unfortunately, current analytical models require some microarchitecture dependent inputs, such as cache miss rates, branch miss rates and memory-level parallelism. This requires profiling the applications for each cache and branch predictor configuration, which is far more time-consuming than evaluating the actual performance models. In this work we present a micro-architecture independent profiler and associated analytical models that allow us to produce performance and power estimates across a large design space almost instantaneously. We show that using a micro-architecture independent profile leads to a speedup of 25% for our evaluated design space, compared to an analytical model that uses micro-architecture dependent profiles. Over a large design space, the model has a 13% error for performance and a 7% error for power, compared to cycle-level simulation. The model is able to accurately determine the optimal processor configuration for different applications under power or performance constraints, and it can provide insight into performance through cycle stacks.
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DESIGN

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Chicago
Van den Steen, Sam, Sander De Pestel, Moncef Mechri, Stijn Eyerman, Trevor Carlson, David Black-Schaffer, Erik Hagersten, and Lieven Eeckhout. 2015. “Micro-architecture Independent Analytical Processor Performance and Power Modeling.” In IEEE International Symposium on Performance Analysis of Systems and Software-ISPASS, 32–41.
APA
Van den Steen, S., De Pestel, S., Mechri, M., Eyerman, S., Carlson, T., Black-Schaffer, D., Hagersten, E., et al. (2015). Micro-architecture independent analytical processor performance and power modeling. IEEE International Symposium on Performance Analysis of Systems and Software-ISPASS (pp. 32–41). Presented at the IEEE INTERNATIONAL SYMPOSIUM ON PERFORMANCE ANALYSIS OF SYSTEMS AND SOFTWARE (ISPASS).
Vancouver
1.
Van den Steen S, De Pestel S, Mechri M, Eyerman S, Carlson T, Black-Schaffer D, et al. Micro-architecture independent analytical processor performance and power modeling. IEEE International Symposium on Performance Analysis of Systems and Software-ISPASS. 2015. p. 32–41.
MLA
Van den Steen, Sam, Sander De Pestel, Moncef Mechri, et al. “Micro-architecture Independent Analytical Processor Performance and Power Modeling.” IEEE International Symposium on Performance Analysis of Systems and Software-ISPASS. 2015. 32–41. Print.
@inproceedings{6855685,
  abstract     = {Optimizing processors for specific application(s) can substantially improve energy-efficiency. With the end of Dennard scaling, and the corresponding reduction in energyefficiency gains from technology scaling, such approaches may become increasingly important. However, designing applicationspecific processors require fast design space exploration tools to optimize for the targeted application(s). Analytical models can be a good fit for such design space exploration as they provide fast performance estimations and insight into the interaction between an application{\textquoteright}s characteristics and the micro-architecture of a processor.

Unfortunately, current analytical models require some microarchitecture dependent inputs, such as cache miss rates, branch miss rates and memory-level parallelism. This requires profiling the applications for each cache and branch predictor configuration, which is far more time-consuming than evaluating the actual performance models. In this work we present a micro-architecture independent profiler and associated analytical models that allow us to produce performance and power estimates across a large design space almost instantaneously.

We show that using a micro-architecture independent profile leads to a speedup of 25\% for our evaluated design space, compared to an analytical model that uses micro-architecture dependent profiles. Over a large design space, the model has a 13\% error for performance and a 7\% error for power, compared to cycle-level simulation. The model is able to accurately determine the optimal processor configuration for different applications under power or performance constraints, and it can provide insight into performance through cycle stacks.},
  author       = {Van den Steen, Sam and De Pestel, Sander and Mechri, Moncef and Eyerman, Stijn and Carlson, Trevor and Black-Schaffer, David and Hagersten, Erik and Eeckhout, Lieven},
  booktitle    = {IEEE International Symposium on Performance Analysis of Systems and Software-ISPASS},
  isbn         = {978-1-4799-1957-4},
  keyword      = {DESIGN},
  language     = {eng},
  location     = {Philidelphia, PA},
  pages        = {32--41},
  title        = {Micro-architecture independent analytical processor performance and power modeling},
  year         = {2015},
}

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