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Reducing the dynamic FPGA reconfiguration overhead with loop transformations

Tom Degryse (UGent), Karel Bruneel (UGent), Harald Devos (UGent) and Dirk Stroobandt (UGent)
(2008) p.219-222
Author
Organization
Abstract
Dynamic hardware generation reduces the number of FPGA resources needed and speeds up the application by optimizing the configuration for the exact problem at hand at run-time. If the problem changes, the system needs to be reconfigured. When this occurs too often, the total reconfiguration overhead is too high and the benefit of using dynamic hardware generation vanishes. Hence, it is important to minimize the number of reconfigurations.

Citation

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Chicago
Degryse, Tom, Karel Bruneel, Harald Devos, and Dirk Stroobandt. 2008. “Reducing the Dynamic FPGA Reconfiguration Overhead with Loop Transformations.” In , 219–222.
APA
Degryse, T., Bruneel, K., Devos, H., & Stroobandt, D. (2008). Reducing the dynamic FPGA reconfiguration overhead with loop transformations (pp. 219–222). Presented at the Fourth International Summer School on Advanced Computer Architecture and Compilation for Embedded Systems.
Vancouver
1.
Degryse T, Bruneel K, Devos H, Stroobandt D. Reducing the dynamic FPGA reconfiguration overhead with loop transformations. 2008. p. 219–22.
MLA
Degryse, Tom, Karel Bruneel, Harald Devos, et al. “Reducing the Dynamic FPGA Reconfiguration Overhead with Loop Transformations.” 2008. 219–222. Print.
@inproceedings{680604,
  abstract     = {Dynamic hardware generation reduces the number of FPGA resources needed and speeds up the application by optimizing the configuration for the exact problem at hand at run-time. If the problem changes, the system needs to be reconfigured. When this occurs too often, the total reconfiguration overhead is too high and the benefit of using dynamic hardware generation vanishes. Hence, it is important to minimize the number of reconfigurations.},
  author       = {Degryse, Tom and Bruneel, Karel and Devos, Harald and Stroobandt, Dirk},
  language     = {eng},
  location     = {L'Aquila, Italy},
  pages        = {219--222},
  title        = {Reducing the dynamic FPGA reconfiguration overhead with loop transformations},
  year         = {2008},
}