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A Dynamic Analysis Tool for Finding Coarse-Grain Parallelism

Sean Rul UGent, Hans Vandierendonck UGent and Koen De Bosschere UGent (2008) HiPEAC Industrial Workshop, 5th, Proceedings.
abstract
While the chip multiprocessor (CMP) has quickly become the predominant processor architecture, its continuing success largely depends on the parallelizability of complex programs. In the early 1990s great successes were obtained to extract parallelism from the inner loops of scientific computations. General-purpose programs, however, stayed out-of-reach due to the complexity of their control flow and data dependences. In this paper we present a tool to extract coarse-grain parallelism in the outer program loops, even in general-purpose programs, and helps the programmer to parallelize it. This coarse-grain parallelism can be exploited efficiently on multi-cores without additional hardware support.
Please use this url to cite or link to this publication:
author
organization
year
type
conference
publication status
published
subject
keyword
dynamic analysis, coarse-grain parallelism
in
HiPEAC Industrial Workshop, 5th, Proceedings
pages
2 pages
conference name
5th HiPEAC Industrial Workshop
conference location
Barcelona, Spain
conference start
2008-06-04
conference end
2008-06-04
language
English
UGent publication?
yes
classification
C1
id
679548
handle
http://hdl.handle.net/1854/LU-679548
date created
2009-06-05 13:02:01
date last changed
2016-12-19 15:36:13
@inproceedings{679548,
  abstract     = {While the chip multiprocessor (CMP) has quickly become the predominant processor architecture, its continuing success largely depends on the parallelizability of complex programs. In the early 1990s great successes were obtained to extract parallelism from the inner loops of scientific computations. General-purpose programs, however, stayed out-of-reach due to the complexity of their control flow and data dependences. In this paper we present a tool to extract coarse-grain parallelism in the outer program loops, even in general-purpose programs, and helps the programmer to parallelize it. This coarse-grain parallelism can be exploited efficiently on multi-cores without additional hardware support.},
  author       = {Rul, Sean and Vandierendonck, Hans and De Bosschere, Koen},
  booktitle    = {HiPEAC Industrial Workshop, 5th, Proceedings},
  keyword      = {dynamic analysis,coarse-grain parallelism},
  language     = {eng},
  location     = {Barcelona, Spain},
  pages        = {2},
  title        = {A Dynamic Analysis Tool for Finding Coarse-Grain Parallelism},
  year         = {2008},
}

Chicago
Rul, Sean, Hans Vandierendonck, and Koen De Bosschere. 2008. “A Dynamic Analysis Tool for Finding Coarse-Grain Parallelism.” In HiPEAC Industrial Workshop, 5th, Proceedings.
APA
Rul, S., Vandierendonck, H., & De Bosschere, K. (2008). A Dynamic Analysis Tool for Finding Coarse-Grain Parallelism. HiPEAC Industrial Workshop, 5th, Proceedings. Presented at the 5th HiPEAC Industrial Workshop.
Vancouver
1.
Rul S, Vandierendonck H, De Bosschere K. A Dynamic Analysis Tool for Finding Coarse-Grain Parallelism. HiPEAC Industrial Workshop, 5th, Proceedings. 2008.
MLA
Rul, Sean, Hans Vandierendonck, and Koen De Bosschere. “A Dynamic Analysis Tool for Finding Coarse-Grain Parallelism.” HiPEAC Industrial Workshop, 5th, Proceedings. 2008. Print.