Advanced search
Add to list

Automatic Generation of Run-time Parameterizable Configurations

Karel Bruneel (UGent) and Dirk Stroobandt (UGent)
Author
Organization
Abstract
In many applications, subsequent data manipulations differ only in a small set of parameter values. Because of their reconfigurability, FPGAs (Field Programmable Gate Arrays) can be configured with an optimized configuration every time the parameter values change. These optimized configurations are smaller and faster than their generic counterparts. However, the overhead involved in generating the configurations at run-time with conventional tools is very large. This paper introduces an automatic method for generating run-time parameterizable configurations from arbitrary Boolean circuits. These configurations in which some of the configuration bits are expressed as a function of a set of parameters enable very fast run-time specialization since specialization only involves evaluating these functions. Our approach is validated on adaptive filtering. We show that the specialized filter configurations produced by our method are 2.3 times smaller and 36% faster than a generic filter configuration and that these configurations can be generated in on average 166 ľs. Being a generic method, run-time hardware optimization suddenly becomes feasible for a large class of applications.
Keywords
reconfiguration, FPGA, synthesis

Citation

Please use this url to cite or link to this publication:

MLA
Bruneel, Karel, and Dirk Stroobandt. “Automatic Generation of Run-time Parameterizable Configurations.” 2008 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE AND LOGIC APPLICATIONS, VOLS 1 AND 2. Ed. U. Kebschull, M. Platzner, & J. Teich. New York: IEEE, 2008. 360–365. Print.
APA
Bruneel, K., & Stroobandt, D. (2008). Automatic Generation of Run-time Parameterizable Configurations. In U. Kebschull, M. Platzner, & J. Teich (Eds.), 2008 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE AND LOGIC APPLICATIONS, VOLS 1 AND 2 (pp. 360–365). Presented at the International Conference on Field Programmable Logic and Applications, New York: IEEE.
Chicago author-date
Bruneel, Karel, and Dirk Stroobandt. 2008. “Automatic Generation of Run-time Parameterizable Configurations.” In 2008 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE AND LOGIC APPLICATIONS, VOLS 1 AND 2, ed. U. Kebschull, M. Platzner, and J. Teich, 360–365. New York: IEEE.
Chicago author-date (all authors)
Bruneel, Karel, and Dirk Stroobandt. 2008. “Automatic Generation of Run-time Parameterizable Configurations.” In 2008 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE AND LOGIC APPLICATIONS, VOLS 1 AND 2, ed. U. Kebschull, M. Platzner, and J. Teich, 360–365. New York: IEEE.
Vancouver
1.
Bruneel K, Stroobandt D. Automatic Generation of Run-time Parameterizable Configurations. In: Kebschull U, Platzner M, Teich J, editors. 2008 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE AND LOGIC APPLICATIONS, VOLS 1 AND 2. New York: IEEE; 2008. p. 360–5.
IEEE
[1]
K. Bruneel and D. Stroobandt, “Automatic Generation of Run-time Parameterizable Configurations,” in 2008 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE AND LOGIC APPLICATIONS, VOLS 1 AND 2, Heidelberg, Germany, 2008, pp. 360–365.
@inproceedings{678933,
  abstract     = {In many applications, subsequent data manipulations differ only in a small set of parameter values. Because of their reconfigurability, FPGAs (Field Programmable Gate Arrays) can be configured with an optimized configuration every time the parameter values change. These optimized configurations are smaller and faster than their generic counterparts. However, the overhead involved in generating the configurations at run-time with conventional tools is very large. This paper introduces an automatic method for generating run-time parameterizable configurations from arbitrary Boolean circuits. These configurations in which some of the configuration bits are expressed as a function of a set of parameters enable very fast run-time specialization since specialization only involves evaluating these functions. Our approach is validated on adaptive filtering. We show that the specialized filter configurations produced by our method are 2.3 times smaller and 36% faster than a generic filter configuration and that these configurations can be generated in on average 166 ľs. Being a generic method, run-time hardware optimization suddenly becomes feasible for a large class of applications.},
  author       = {Bruneel, Karel and Stroobandt, Dirk},
  booktitle    = {2008 INTERNATIONAL CONFERENCE ON FIELD PROGRAMMABLE AND LOGIC APPLICATIONS, VOLS 1 AND 2},
  editor       = {Kebschull, U. and Platzner, M. and Teich, J.},
  isbn         = {978-1-4244-1960-9},
  keywords     = {reconfiguration,FPGA,synthesis},
  language     = {eng},
  location     = {Heidelberg, Germany},
  pages        = {360--365},
  publisher    = {IEEE},
  title        = {Automatic Generation of Run-time Parameterizable Configurations},
  year         = {2008},
}

Web of Science
Times cited: