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The FPGA's interconnection network not only requires the larger portion of the total silicon area in comparison to the logic available on the FPGA, it also contributes to the majority of the delay and power consumption. Therefore it is essential that routing algorithms are as efficient as possible. In this work the connection router is introduced. It is capable of partially ripping up and rerouting the routing trees of nets. To achieve this, the main congestion loop rips up and reroutes connections instead of nets, which allows the connection router to converge much faster to a solution. The connection router is compared with the VPR directed search router on the basis of VTR benchmarks on a modern commercial FPGA architecture. It is able to find routing solutions 4.4% faster for a relaxed routing problem and 84.3% faster for hard instances of the routing problem. And given the same amount of time as the VPR directed search, the connection router is able to find routing solutions with 5.8% less tracks per channel.

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Chicago
Vansteenkiste, Elias, Karel Bruneel, and Dirk Stroobandt. 2013. “A Connection-based Router for FPGAs.” In PROCEEDINGS OF THE 2013 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT), 326–329.
APA
Vansteenkiste, Elias, Bruneel, K., & Stroobandt, D. (2013). A connection-based router for FPGAs. PROCEEDINGS OF THE 2013 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT) (pp. 326–329). Presented at the 12th International Conference on Field-Programmable Technology (FPT).
Vancouver
1.
Vansteenkiste E, Bruneel K, Stroobandt D. A connection-based router for FPGAs. PROCEEDINGS OF THE 2013 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT). 2013. p. 326–9.
MLA
Vansteenkiste, Elias, Karel Bruneel, and Dirk Stroobandt. “A Connection-based Router for FPGAs.” PROCEEDINGS OF THE 2013 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT). 2013. 326–329. Print.
@inproceedings{4254446,
  abstract     = {The FPGA's interconnection network not only requires the larger portion of the total silicon area in comparison to the logic available on the FPGA, it also contributes to the majority of the delay and power consumption. Therefore it is essential that routing algorithms are as efficient as possible. In this work the connection router is introduced. It is capable of partially ripping up and rerouting the routing trees of nets. To achieve this, the main congestion loop rips up and reroutes connections instead of nets, which allows the connection router to converge much faster to a solution. The connection router is compared with the VPR directed search router on the basis of VTR benchmarks on a modern commercial FPGA architecture. It is able to find routing solutions 4.4\% faster for a relaxed routing problem and 84.3\% faster for hard instances of the routing problem. And given the same amount of time as the VPR directed search, the connection router is able to find routing solutions with 5.8\% less tracks per channel.},
  author       = {Vansteenkiste, Elias and Bruneel, Karel and Stroobandt, Dirk},
  booktitle    = {PROCEEDINGS OF THE 2013 INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT)},
  isbn         = {978-1-4799-2198-0},
  language     = {eng},
  location     = {Kyoto, Japan},
  pages        = {326--329},
  title        = {A connection-based router for FPGAs},
  url          = {http://dx.doi.org/10.1109/FPT.2013.6718378},
  year         = {2013},
}

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