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Loop Controller Area Estimation for Automatic Design Space Exploration

Tom Degryse (UGent) , Harald Devos (UGent) and Dirk Stroobandt (UGent)
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Keywords
FPGA, area estimation, high-level synthesis, loop controller

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Citation

Please use this url to cite or link to this publication:

Chicago
Degryse, Tom, Harald Devos, and Dirk Stroobandt. 2007. “Loop Controller Area Estimation for Automatic Design Space Exploration.” In Architecture and Compilers for Embedded Systems (ACES 2007), Ghent, 31–34. Academia Press.
APA
Degryse, T., Devos, H., & Stroobandt, D. (2007). Loop Controller Area Estimation for Automatic Design Space Exploration. Architecture and Compilers for Embedded Systems (ACES 2007), Ghent (pp. 31–34). Academia Press.
Vancouver
1.
Degryse T, Devos H, Stroobandt D. Loop Controller Area Estimation for Automatic Design Space Exploration. Architecture and Compilers for Embedded Systems (ACES 2007), Ghent. Academia Press; 2007. p. 31–4.
MLA
Degryse, Tom, Harald Devos, and Dirk Stroobandt. “Loop Controller Area Estimation for Automatic Design Space Exploration.” Architecture and Compilers for Embedded Systems (ACES 2007), Ghent. Academia Press, 2007. 31–34. Print.
@inproceedings{416982,
  author       = {Degryse, Tom and Devos, Harald and Stroobandt, Dirk},
  booktitle    = {Architecture and Compilers for Embedded Systems (ACES 2007), Ghent},
  keyword      = {FPGA,area estimation,high-level synthesis,loop controller},
  language     = {eng},
  pages        = {31--34},
  publisher    = {Academia Press},
  title        = {Loop Controller Area Estimation for Automatic Design Space Exploration},
  url          = {http://dx.doi.org/1854/11113},
  year         = {2007},
}

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