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Macromodeling of high-speed interconnects by positive interpolation of vertical segments

Oliver Salazar Celis, Annie Cuyt, Dirk Deschrijver UGent, Dries Vande Ginste UGent, Tom Dhaene UGent and Luc Knockaert UGent (2013) APPLIED MATHEMATICAL MODELLING. 37(7). p.4874-4882
abstract
State-of-the-art interconnect design is very challenging. Designers are facing ever more stringent design specifications expressed in terms of bandwidth, speed, crosstalk, signal attenuation, etc. that dictate the need for powerful modeling tools. It is of a paramount importance that these tools are able to very accurately incorporate all substrate loss mechanisms and the finite conductivity and shape of the metallic interconnects. From this perspective, macromodels describing all high-frequency behavior are extremely useful to analyze the signal integrity (SI) behavior of the interconnects. Often, interconnect structures are characterized by using their cross-sectional geometry in a two-dimensional (2-D) electromagnetic (EM) simulation, leading up to a corresponding transmission line model [1]. An accurate description of the interconnects is then provided in terms of their per unit of length (p.u.1.) resistance (R), inductance (L), conductance (G) and capacitance (C) parameters, yielding so-called RLGC(f) models. Here, f denotes the frequency, as such indicating the frequency-dependent character of the p.u.l. parameters. For a comprehensive overview of such modeling methods, the reader is encouraged to consult [1] and the references therein. For on-chip lines that are electrically very short, sometimes, the p.u.l. resistance R and capacitance C are dominant (RC regime). In the present paper, however, all four p.u.l. parameters are considered, making the approach more general and also valid at very high frequencies. Thereto, a very accurate 2-D EM modeling procedure, making use of a Dirichlet-to-Neumann (DtN) boundary operator, is used as a starting point [2]. This method
Please use this url to cite or link to this publication:
author
organization
year
type
journalArticle (original)
publication status
published
subject
keyword
On-chip interconnect, Signal integrity, Transmission line, Rational model, Macromodel, LINES, LAGRANGE, APPROXIMATION, BARYCENTRIC RATIONAL INTERPOLATION, ACCURATE ALGORITHM
journal title
APPLIED MATHEMATICAL MODELLING
Appl. Math. Model.
volume
37
issue
7
pages
4874 - 4882
Web of Science type
Article
Web of Science id
000316579600023
JCR category
MECHANICS
JCR impact factor
2.158 (2013)
JCR rank
15/139 (2013)
JCR quartile
1 (2013)
ISSN
0307-904X
DOI
10.1016/j.apm.2012.09.068
language
English
UGent publication?
yes
classification
A1
copyright statement
I have transferred the copyright for this publication to the publisher
id
3238345
handle
http://hdl.handle.net/1854/LU-3238345
date created
2013-06-10 11:31:34
date last changed
2016-12-19 15:45:44
@article{3238345,
  abstract     = {State-of-the-art interconnect design is very challenging. Designers are facing ever more stringent design specifications expressed in terms of bandwidth, speed, crosstalk, signal attenuation, etc. that dictate the need for powerful modeling tools. It is of a paramount importance that these tools are able to very accurately incorporate all substrate loss mechanisms and the finite conductivity and shape of the metallic interconnects. From this perspective, macromodels describing all high-frequency behavior are extremely useful to analyze the signal integrity (SI) behavior of the interconnects. Often, interconnect structures are characterized by using their cross-sectional geometry in a two-dimensional (2-D) electromagnetic (EM) simulation, leading up to a corresponding transmission line model [1]. An accurate description of the interconnects is then provided in terms of their per unit of length (p.u.1.) resistance (R), inductance (L), conductance (G) and capacitance (C) parameters, yielding so-called RLGC(f) models. Here, f denotes the frequency, as such indicating the frequency-dependent character of the p.u.l. parameters. For a comprehensive overview of such modeling methods, the reader is encouraged to consult [1] and the references therein. For on-chip lines that are electrically very short, sometimes, the p.u.l. resistance R and capacitance C are dominant (RC regime). In the present paper, however, all four p.u.l. parameters are considered, making the approach more general and also valid at very high frequencies. Thereto, a very accurate 2-D EM modeling procedure, making use of a Dirichlet-to-Neumann (DtN) boundary operator, is used as a starting point [2]. This method},
  author       = {Celis, Oliver Salazar and Cuyt, Annie and Deschrijver, Dirk and Vande Ginste, Dries and Dhaene, Tom and Knockaert, Luc},
  issn         = {0307-904X},
  journal      = {APPLIED MATHEMATICAL MODELLING},
  keyword      = {On-chip interconnect,Signal integrity,Transmission line,Rational model,Macromodel,LINES,LAGRANGE,APPROXIMATION,BARYCENTRIC RATIONAL INTERPOLATION,ACCURATE ALGORITHM},
  language     = {eng},
  number       = {7},
  pages        = {4874--4882},
  title        = {Macromodeling of high-speed interconnects by positive interpolation of vertical segments},
  url          = {http://dx.doi.org/10.1016/j.apm.2012.09.068},
  volume       = {37},
  year         = {2013},
}

Chicago
Celis, Oliver Salazar, Annie Cuyt, Dirk Deschrijver, Dries Vande Ginste, Tom Dhaene, and Luc Knockaert. 2013. “Macromodeling of High-speed Interconnects by Positive Interpolation of Vertical Segments.” Applied Mathematical Modelling 37 (7): 4874–4882.
APA
Celis, O. S., Cuyt, A., Deschrijver, D., Vande Ginste, D., Dhaene, T., & Knockaert, L. (2013). Macromodeling of high-speed interconnects by positive interpolation of vertical segments. APPLIED MATHEMATICAL MODELLING, 37(7), 4874–4882.
Vancouver
1.
Celis OS, Cuyt A, Deschrijver D, Vande Ginste D, Dhaene T, Knockaert L. Macromodeling of high-speed interconnects by positive interpolation of vertical segments. APPLIED MATHEMATICAL MODELLING. 2013;37(7):4874–82.
MLA
Celis, Oliver Salazar, Annie Cuyt, Dirk Deschrijver, et al. “Macromodeling of High-speed Interconnects by Positive Interpolation of Vertical Segments.” APPLIED MATHEMATICAL MODELLING 37.7 (2013): 4874–4882. Print.