3D stacking of ultrathin chip packages: an innovative packaging and interconnection technology
- Author
- Swarnakamal Priyabadini (UGent) , Tom Sterken (UGent) , Luc Van Hoorebeke (UGent) and Jan Vanfleteren (UGent)
- Organization
- Abstract
- In order to increase the functionality of electronic devices, while reducing the overall size and weight of the electronic chip packages, electronic chip packages can be combined into a 3D assembly. In this field we present a technology for stacking of multiple chip packages, resulting in a total volume almost equal to that of a single bare die. The technology is based on batch-processed ultra-thin chip packages (UTCPs) with a fine pitch metal fan-out. Package-on-package (PoP) technology enables stacking of UTCPs by vacuum lamination, followed by through hole interconnection technology for making contacts to the metal fan-out of the embedded UTCPs within the stack. The individual chip packages can be tested before stacking.
- Keywords
- 3D-stacking, Through hole interconnection, Multi-UTCP, EEPROM memory dies stacking, Vacuum lamination
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Citation
Please use this url to cite or link to this publication: http://hdl.handle.net/1854/LU-2973380
- MLA
- Priyabadini, Swarnakamal, et al. “3D Stacking of Ultrathin Chip Packages: An Innovative Packaging and Interconnection Technology.” IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, vol. 3, no. 7, 2013, pp. 1114–22, doi:10.1109/TCPMT.2012.2234830.
- APA
- Priyabadini, S., Sterken, T., Van Hoorebeke, L., & Vanfleteren, J. (2013). 3D stacking of ultrathin chip packages: an innovative packaging and interconnection technology. IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 3(7), 1114–1122. https://doi.org/10.1109/TCPMT.2012.2234830
- Chicago author-date
- Priyabadini, Swarnakamal, Tom Sterken, Luc Van Hoorebeke, and Jan Vanfleteren. 2013. “3D Stacking of Ultrathin Chip Packages: An Innovative Packaging and Interconnection Technology.” IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY 3 (7): 1114–22. https://doi.org/10.1109/TCPMT.2012.2234830.
- Chicago author-date (all authors)
- Priyabadini, Swarnakamal, Tom Sterken, Luc Van Hoorebeke, and Jan Vanfleteren. 2013. “3D Stacking of Ultrathin Chip Packages: An Innovative Packaging and Interconnection Technology.” IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY 3 (7): 1114–1122. doi:10.1109/TCPMT.2012.2234830.
- Vancouver
- 1.Priyabadini S, Sterken T, Van Hoorebeke L, Vanfleteren J. 3D stacking of ultrathin chip packages: an innovative packaging and interconnection technology. IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY. 2013;3(7):1114–22.
- IEEE
- [1]S. Priyabadini, T. Sterken, L. Van Hoorebeke, and J. Vanfleteren, “3D stacking of ultrathin chip packages: an innovative packaging and interconnection technology,” IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, vol. 3, no. 7, pp. 1114–1122, 2013.
@article{2973380,
abstract = {{In order to increase the functionality of electronic devices, while reducing the overall size and weight of the electronic chip packages, electronic chip packages can be combined into a 3D assembly. In this field we present a technology for stacking of multiple chip packages, resulting in a total volume almost equal to that of a single bare die. The technology is based on batch-processed ultra-thin chip packages (UTCPs) with a fine pitch metal fan-out. Package-on-package (PoP) technology enables stacking of UTCPs by vacuum lamination, followed by through hole interconnection technology for making contacts to the metal fan-out of the embedded UTCPs within the stack. The individual chip packages can be tested before stacking.}},
author = {{Priyabadini, Swarnakamal and Sterken, Tom and Van Hoorebeke, Luc and Vanfleteren, Jan}},
issn = {{2156-3950}},
journal = {{IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY}},
keywords = {{3D-stacking,Through hole interconnection,Multi-UTCP,EEPROM memory dies stacking,Vacuum lamination}},
language = {{eng}},
number = {{7}},
pages = {{1114--1122}},
title = {{3D stacking of ultrathin chip packages: an innovative packaging and interconnection technology}},
url = {{http://doi.org/10.1109/TCPMT.2012.2234830}},
volume = {{3}},
year = {{2013}},
}
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