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A high voltage p-type drain extended mos in a low voltage sub-micron cmos technology

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Chicago
Vermandel, Miguel, Christof De Backere, André Van Calster, J WITTERS, and M TACK. 1998. “A High Voltage P-type Drain Extended Mos in a Low Voltage Sub-micron Cmos Technology.” In Proceedings of the 28th European Solid-State Device Research Conference, Bordeaux, September, 492–495.
APA
Vermandel, M., De Backere, C., Van Calster, A., WITTERS, J., & TACK, M. (1998). A high voltage p-type drain extended mos in a low voltage sub-micron cmos technology. Proceedings of the 28th European Solid-State Device Research Conference, Bordeaux, september (pp. 492–495).
Vancouver
1.
Vermandel M, De Backere C, Van Calster A, WITTERS J, TACK M. A high voltage p-type drain extended mos in a low voltage sub-micron cmos technology. Proceedings of the 28th European Solid-State Device Research Conference, Bordeaux, september. 1998. p. 492–5.
MLA
Vermandel, Miguel, Christof De Backere, André Van Calster, et al. “A High Voltage P-type Drain Extended Mos in a Low Voltage Sub-micron Cmos Technology.” Proceedings of the 28th European Solid-State Device Research Conference, Bordeaux, September. 1998. 492–495. Print.
@inproceedings{282077,
  author       = {Vermandel, Miguel and De Backere, Christof and Van Calster, Andr{\'e} and WITTERS, J and TACK, M},
  booktitle    = {Proceedings of the 28th European Solid-State Device Research Conference, Bordeaux, september},
  language     = {eng},
  pages        = {492--495},
  title        = {A high voltage p-type drain extended mos in a low voltage sub-micron cmos technology},
  year         = {1998},
}