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How sensitive is processor customization to the workload's input datasets?

Maximilien Breughe, Li Zheng, Yang Chen, Stijn Eyerman, Olivier Temam, Chengyong Wu and Lieven Eeckhout UGent (2011) Design Automation Conference, Abstracts.
abstract
Hardware customization is an effective approach for meeting application performance requirements while achieving high levels of energy efficiency. Application-specific processors achieve high performance at low energy by tailoring their designs towards a specific workload, i.e., an application or application domain of interest. A fundamental question that has remained unanswered so far though is to what extent processor customization is sensitive to the training workload's input datasets. Current practice is to consider a single or only a few input datasets per workload during the processor design cycle - the reason being that simulation is prohibitively time-consuming which excludes considering a large number of datasets. This paper addresses this fundamental question, for the first time. In order to perform the large number of runs required to address this question in a reasonable amount of time, we first propose a mechanistic analytical model, built from first principles, that is accurate within 3.6% on average across a broad design space. The analytical model is at least 4 orders of magnitude faster than detailed cycle-accurate simulation for design space exploration. Using the model, we are able to study the sensitivity of a workload's input dataset on the optimum customized processor architecture. Considering MiBench benchmarks and 1000 datasets per benchmark, we conclude that processor customization is largely dataset-insensitive. This has an important implication in practice: a single or only a few datasets are sufficient for determining the optimum processor architecture when designing application-specific processors.
Please use this url to cite or link to this publication:
author
organization
year
type
conference
publication status
unpublished
subject
keyword
instruction sets, computer architecture, power aware computing, multiprocessing systems, low-power electronics, logic design, application specific integrated circuits, energy conservation
in
Design Automation Conference, Abstracts
conference name
Design Automation Conference (DAC - 2011)
conference location
San Diego, CA, USA
conference start
2011-06-03
conference end
2011-06-07
language
English
UGent publication?
yes
classification
C3
additional info
This is a poster, presented at the Design Automaticon Conference at the 8th of June, 2011.
copyright statement
I have transferred the copyright for this publication to the publisher
id
2095581
handle
http://hdl.handle.net/1854/LU-2095581
date created
2012-04-26 16:46:12
date last changed
2016-12-19 15:34:55
@inproceedings{2095581,
  abstract     = {Hardware customization is an effective approach for meeting application performance requirements while achieving high levels of energy efficiency. Application-specific processors achieve high performance at low energy by tailoring their designs towards a specific workload, i.e., an application or application domain of interest. A fundamental question that has remained unanswered so far though is to what extent processor customization is sensitive to the training workload's input datasets. Current practice is to consider a single or only a few input datasets per workload during the processor design cycle - the reason being that simulation is prohibitively time-consuming which excludes considering a large number of datasets. This paper addresses this fundamental question, for the first time. In order to perform the large number of runs required to address this question in a reasonable amount of time, we first propose a mechanistic analytical model, built from first principles, that is accurate within 3.6\% on average across a broad design space. The analytical model is at least 4 orders of magnitude faster than detailed cycle-accurate simulation for design space exploration. Using the model, we are able to study the sensitivity of a workload's input dataset on the optimum customized processor architecture. Considering MiBench benchmarks and 1000 datasets per benchmark, we conclude that processor customization is largely dataset-insensitive. This has an important implication in practice: a single or only a few datasets are sufficient for determining the optimum processor architecture when designing application-specific processors.},
  author       = {Breughe, Maximilien and Zheng, Li and Chen, Yang  and Eyerman, Stijn and Temam, Olivier  and Wu, Chengyong  and Eeckhout, Lieven},
  booktitle    = {Design Automation Conference, Abstracts},
  keyword      = {instruction sets,computer architecture,power aware computing,multiprocessing systems,low-power electronics,logic design,application specific integrated circuits,energy conservation},
  language     = {eng},
  location     = {San Diego, CA, USA},
  title        = {How sensitive is processor customization to the workload's input datasets?},
  year         = {2011},
}

Chicago
Breughe, Maximilien, Li Zheng, Yang Chen, Stijn Eyerman, Olivier Temam, Chengyong Wu, and Lieven Eeckhout. 2011. “How Sensitive Is Processor Customization to the Workload’s Input Datasets?” In Design Automation Conference, Abstracts.
APA
Breughe, M., Zheng, L., Chen, Y., Eyerman, S., Temam, O., Wu, C., & Eeckhout, L. (2011). How sensitive is processor customization to the workload’s input datasets? Design Automation Conference, Abstracts. Presented at the Design Automation Conference (DAC - 2011).
Vancouver
1.
Breughe M, Zheng L, Chen Y, Eyerman S, Temam O, Wu C, et al. How sensitive is processor customization to the workload’s input datasets? Design Automation Conference, Abstracts. 2011.
MLA
Breughe, Maximilien, Li Zheng, Yang Chen, et al. “How Sensitive Is Processor Customization to the Workload’s Input Datasets?” Design Automation Conference, Abstracts. 2011. Print.