Si Trench Around Drain (STAD) technology of GaN-DHFETs on Si substrate for boosting power performance
- Author
- P Srivastava, H Oprins, M Van Hove, J Das, PE Malinowski, Benoit Bakeroot (UGent) , D Marcon, D Visalli, X Kang, S Lenci, K Geens, J Viaene, K Cheng, M Leys, I De Wolf, S Decoutere, RP Mertens and G Borghs
- Organization
- Abstract
- We report on the first measurement results to obtain over 2 kV breakdown voltage (V-BD) of GaN-DHFETs on Si substrates by etching a Si Trench Around Drain contacts (STAD). Similar devices without trenches show V-BD of only 650 V. DHFETs fabricated with STAD technology show excellent thermal performance confirmed by electrical measurements and finite element thermal simulations. We observe lower buffer leakage at high temperature (100 degrees C) after STAD compared to devices with Si substrate, enabling high temperature device operation.
- Keywords
- SILICON, ALGAN/GAN HEMTS
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Citation
Please use this url to cite or link to this publication: http://hdl.handle.net/1854/LU-2061832
- MLA
- Srivastava, P., et al. “Si Trench Around Drain (STAD) Technology of GaN-DHFETs on Si Substrate for Boosting Power Performance.” 2011 IEEE International Electron Devices Meeting (IEDM), IEEE, 2011.
- APA
- Srivastava, P., Oprins, H., Van Hove, M., Das, J., Malinowski, P., Bakeroot, B., … Borghs, G. (2011). Si Trench Around Drain (STAD) technology of GaN-DHFETs on Si substrate for boosting power performance. 2011 IEEE International Electron Devices Meeting (IEDM). Presented at the IEEE International Electron Devices Meeting (IEDM), Washington, DC, USA.
- Chicago author-date
- Srivastava, P, H Oprins, M Van Hove, J Das, PE Malinowski, Benoit Bakeroot, D Marcon, et al. 2011. “Si Trench Around Drain (STAD) Technology of GaN-DHFETs on Si Substrate for Boosting Power Performance.” In 2011 IEEE International Electron Devices Meeting (IEDM). New York, NY, USA: IEEE.
- Chicago author-date (all authors)
- Srivastava, P, H Oprins, M Van Hove, J Das, PE Malinowski, Benoit Bakeroot, D Marcon, D Visalli, X Kang, S Lenci, K Geens, J Viaene, K Cheng, M Leys, I De Wolf, S Decoutere, RP Mertens, and G Borghs. 2011. “Si Trench Around Drain (STAD) Technology of GaN-DHFETs on Si Substrate for Boosting Power Performance.” In 2011 IEEE International Electron Devices Meeting (IEDM). New York, NY, USA: IEEE.
- Vancouver
- 1.Srivastava P, Oprins H, Van Hove M, Das J, Malinowski P, Bakeroot B, et al. Si Trench Around Drain (STAD) technology of GaN-DHFETs on Si substrate for boosting power performance. In: 2011 IEEE International electron devices meeting (IEDM). New York, NY, USA: IEEE; 2011.
- IEEE
- [1]P. Srivastava et al., “Si Trench Around Drain (STAD) technology of GaN-DHFETs on Si substrate for boosting power performance,” in 2011 IEEE International electron devices meeting (IEDM), Washington, DC, USA, 2011.
@inproceedings{2061832,
abstract = {{We report on the first measurement results to obtain over 2 kV breakdown voltage (V-BD) of GaN-DHFETs on Si substrates by etching a Si Trench Around Drain contacts (STAD). Similar devices without trenches show V-BD of only 650 V. DHFETs fabricated with STAD technology show excellent thermal performance confirmed by electrical measurements and finite element thermal simulations. We observe lower buffer leakage at high temperature (100 degrees C) after STAD compared to devices with Si substrate, enabling high temperature device operation.}},
author = {{Srivastava, P and Oprins, H and Van Hove, M and Das, J and Malinowski, PE and Bakeroot, Benoit and Marcon, D and Visalli, D and Kang, X and Lenci, S and Geens, K and Viaene, J and Cheng, K and Leys, M and De Wolf, I and Decoutere, S and Mertens, RP and Borghs, G}},
booktitle = {{2011 IEEE International electron devices meeting (IEDM)}},
isbn = {{9781457705052}},
keywords = {{SILICON,ALGAN/GAN HEMTS}},
language = {{eng}},
location = {{Washington, DC, USA}},
pages = {{4}},
publisher = {{IEEE}},
title = {{Si Trench Around Drain (STAD) technology of GaN-DHFETs on Si substrate for boosting power performance}},
year = {{2011}},
}