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A rigorous approach to the robust design of continuous-time ΣΔ modulators

Bart De Vuyst, Pieter Rombouts UGent and Georges Gielen (2011) IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS. 58(12). p.2829-2837
abstract
In this paper we present a framework for robust design of continuous-time Sigma Delta modulators. The approach allows to find a modulator which maintains its performance ( stability, guaranteed peak SNR, ...) over all the foreseen parasitic effects, provided it exists. For this purpose, we have introduced the S-figure as a criterion for the robustness of a continuous-time Sigma Delta modulator. This figure, inspired by the worst-case-distance methodology, indicates how close a design is to violating one of its performance requirements. Optimal robustness is obtained by optimizing this S-figure. The approach is illustrated through various design examples and is able to find modulators that are robust to excess loop delay, clock jitter and coefficient variations. As an application of the approach, we have quantified the effect of coefficient trimming. Even with poor trim resolution, good performance can be achieved provided beneficial initial system parameters are chosen. Another example illustrates the fact that also the out-of-band peaking behavior of the signal transfer function can be controlled with our design framework.
Please use this url to cite or link to this publication:
author
organization
alternative title
A rigorous approach to the robust design of continuous-time Sigma Delta modulators
year
type
journalArticle (original)
publication status
published
subject
keyword
CMOS, CONVERTERS, QUANTIZER, COMPENSATION, OPTIMIZATION, SIGNAL BANDWIDTH, DYNAMIC-RANGE, CLOCK JITTER, robust stability, EXCESS-LOOP-DELAY, robust performance, continuous-time sigma-delta (Sigma Delta) modulation, Analog-to-digital (A/D) conversion, ADC
journal title
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
IEEE Trans. Circuits Syst. I-Regul. Pap.
volume
58
issue
12
pages
2829 - 2837
Web of Science type
Article
Web of Science id
000297632900004
JCR category
ENGINEERING, ELECTRICAL & ELECTRONIC
JCR impact factor
1.97 (2011)
JCR rank
52/244 (2011)
JCR quartile
1 (2011)
ISSN
1549-8328
DOI
10.1109/TCSI.2011.2158702
language
English
UGent publication?
yes
classification
A1
copyright statement
I have transferred the copyright for this publication to the publisher
id
1976879
handle
http://hdl.handle.net/1854/LU-1976879
date created
2012-01-03 14:11:25
date last changed
2016-12-19 15:42:22
@article{1976879,
  abstract     = {In this paper we present a framework for robust design of continuous-time Sigma Delta modulators. The approach allows to find a modulator which maintains its performance ( stability, guaranteed peak SNR, ...) over all the foreseen parasitic effects, provided it exists. For this purpose, we have introduced the S-figure as a criterion for the robustness of a continuous-time Sigma Delta modulator. This figure, inspired by the worst-case-distance methodology, indicates how close a design is to violating one of its performance requirements. Optimal robustness is obtained by optimizing this S-figure. The approach is illustrated through various design examples and is able to find modulators that are robust to excess loop delay, clock jitter and coefficient variations. As an application of the approach, we have quantified the effect of coefficient trimming. Even with poor trim resolution, good performance can be achieved provided beneficial initial system parameters are chosen. Another example illustrates the fact that also the out-of-band peaking behavior of the signal transfer function can be controlled with our design framework.},
  author       = {De Vuyst, Bart and Rombouts, Pieter and Gielen, Georges},
  issn         = {1549-8328},
  journal      = {IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS},
  keyword      = {CMOS,CONVERTERS,QUANTIZER,COMPENSATION,OPTIMIZATION,SIGNAL BANDWIDTH,DYNAMIC-RANGE,CLOCK JITTER,robust stability,EXCESS-LOOP-DELAY,robust performance,continuous-time sigma-delta (Sigma Delta) modulation,Analog-to-digital (A/D) conversion,ADC},
  language     = {eng},
  number       = {12},
  pages        = {2829--2837},
  title        = {A rigorous approach to the robust design of continuous-time \ensuremath{\Sigma}\ensuremath{\Delta} modulators},
  url          = {http://dx.doi.org/10.1109/TCSI.2011.2158702},
  volume       = {58},
  year         = {2011},
}

Chicago
De Vuyst, Bart, Pieter Rombouts, and Georges Gielen. 2011. “A Rigorous Approach to the Robust Design of Continuous-time ΣΔ Modulators.” Ieee Transactions on Circuits and Systems I-regular Papers 58 (12): 2829–2837.
APA
De Vuyst, Bart, Rombouts, P., & Gielen, G. (2011). A rigorous approach to the robust design of continuous-time ΣΔ modulators. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 58(12), 2829–2837.
Vancouver
1.
De Vuyst B, Rombouts P, Gielen G. A rigorous approach to the robust design of continuous-time ΣΔ modulators. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS. 2011;58(12):2829–37.
MLA
De Vuyst, Bart, Pieter Rombouts, and Georges Gielen. “A Rigorous Approach to the Robust Design of Continuous-time ΣΔ Modulators.” IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS 58.12 (2011): 2829–2837. Print.