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Using fast and accurate simulation to explore hardware/software trade-offs in the multi-core era

Wim Heirman, Trevor Carlson, Souradip Sarkar UGent, Pieter Ghysels, Wim Vanroose and Lieven Eeckhout UGent (2011) Parco 2011, Proceedings.
abstract
Writing well-performing parallel programs is challenging in the multi-core processor era. In addition to achieving good per-thread performance, which in itself is a balancing act between instruction-level parallelism, pipeline effects and good memory performance, multi-threaded programs complicate matters even further. These programs require synchronization, and are affected by the interactions between threads through sharing of both processor resources and the cache hierarchy. At the Intel Exascience Lab, we are developing an architectural simulator called Sniper for simulating future exascale-era multi-core processors. Its goal is twofold: Sniper should assist hardware designers to make design decisions, while simultaneously providing software designers with a tool to gain insight into the behavior of their algorithms and allow for optimization. By taking architectural features into account, our simulator can provide more insight into parallel programs than what can be obtained from existing performance analysis tools. This unique combination of hardware simulator and software performance analysis tool makes Sniper a useful tool for a simultaneous exploration of the hardware and software design space for future high-performance multi-core systems.
Please use this url to cite or link to this publication:
author
organization
year
type
conference
publication status
published
subject
keyword
software optimization, Architectural simulation, performance analysis
in
Parco 2011, Proceedings
pages
8 pages
conference name
2011 International conference on Parallel Computing (ParCo 2011)
conference location
Ghent, Belgium
conference start
2011-08-30
conference end
2011-09-02
language
English
UGent publication?
yes
classification
C1
copyright statement
I have transferred the copyright for this publication to the publisher
id
1959541
handle
http://hdl.handle.net/1854/LU-1959541
date created
2011-12-03 14:46:24
date last changed
2016-12-19 15:37:18
@inproceedings{1959541,
  abstract     = {Writing well-performing parallel programs is challenging in the multi-core processor era. In addition to achieving good per-thread performance, which in itself is a balancing act between instruction-level parallelism, pipeline effects and good memory performance, multi-threaded programs complicate matters even further.  These programs require synchronization, and are affected by the interactions between threads through sharing of both processor resources and the cache hierarchy.
At the Intel Exascience Lab, we are developing an architectural simulator called Sniper for simulating future exascale-era multi-core processors. Its goal is twofold: Sniper should assist hardware designers to make design decisions, while simultaneously providing software designers with a tool to gain insight into the behavior of their algorithms and allow for optimization. By taking architectural features into account, our simulator can provide more insight into parallel programs than what can be obtained from existing performance analysis tools. This unique combination of hardware simulator and software performance analysis tool makes Sniper a useful tool for a simultaneous exploration of the hardware and software design space for future high-performance multi-core systems.},
  author       = {Heirman, Wim and Carlson, Trevor and Sarkar, Souradip and Ghysels, Pieter and Vanroose, Wim and Eeckhout, Lieven},
  booktitle    = {Parco 2011, Proceedings},
  keyword      = {software optimization,Architectural simulation,performance analysis},
  language     = {eng},
  location     = {Ghent, Belgium},
  pages        = {8},
  title        = {Using fast and accurate simulation to explore hardware/software trade-offs in the multi-core era},
  year         = {2011},
}

Chicago
Heirman, Wim, Trevor Carlson, Souradip Sarkar, Pieter Ghysels, Wim Vanroose, and Lieven Eeckhout. 2011. “Using Fast and Accurate Simulation to Explore Hardware/software Trade-offs in the Multi-core Era.” In Parco 2011, Proceedings.
APA
Heirman, Wim, Carlson, T., Sarkar, S., Ghysels, P., Vanroose, W., & Eeckhout, L. (2011). Using fast and accurate simulation to explore hardware/software trade-offs in the multi-core era. Parco 2011, Proceedings. Presented at the 2011 International conference on Parallel Computing (ParCo 2011).
Vancouver
1.
Heirman W, Carlson T, Sarkar S, Ghysels P, Vanroose W, Eeckhout L. Using fast and accurate simulation to explore hardware/software trade-offs in the multi-core era. Parco 2011, Proceedings. 2011.
MLA
Heirman, Wim, Trevor Carlson, Souradip Sarkar, et al. “Using Fast and Accurate Simulation to Explore Hardware/software Trade-offs in the Multi-core Era.” Parco 2011, Proceedings. 2011. Print.