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Embedding functional simulators in compilers for debugging and profiling

Thibault Delavallee, Philippe Manet, Hans Vandierendonck UGent and Jean-Didier Legat (2011) Faible Tension Faible Consommation (FTFC - 2011). p.55-58
abstract
In embedded systems, achieving good performances for signal processing applications is crucial for power management. Good compilation is required to have maximal use of the available processing capabilities. Compiling for communication-exposed architectures such as ADRES, TRIPS and Wavescalar is however a complex task. Dataflow graphs are mapped on execution unit grids in order to increase the instruction-level parallelism while minimizing communication. Complex algorithms and the large number of code optimizations make debugging hard for the developer. Moreover, iterative approaches are used to optimize the compiled code quality. This paper proposes to embed functional simulators in compilers in order to enable debugging and profiling-driven iterative compilation. Debugging of optimization passes is achieved by means of functional simulators, running the original code and the transformed code. Intermediate and output values results comparison allows to verify the correctness of the optimization pass. Using embedded simulators also allows to extract code and execution characteristics convenient for iterative compilation. We present the mechanisms required to control those simulators. A case study based on the TRIPS processor demonstrates the usefulness of our approach.
Please use this url to cite or link to this publication:
author
organization
year
type
conference
publication status
published
subject
keyword
profiling, simulation, embedded systems, compiler, debug
in
Faible Tension Faible Consommation (FTFC - 2011)
issue title
Low Voltage, Low Power Consumption
article_number
12109452
pages
55 - 58
publisher
IEEE
place of publication
Piscataway, NJ, USA
conference name
Faible Tension Faible Consommation (FTFC - 2011)
conference location
Marrakech, Morocco
conference start
2011-05-30
conference end
2011-06-01
Web of Science type
Conference Paper
Web of Science id
12109452
ISBN
9781612846460
DOI
10.1109/FTFC.2011.5948917
language
English
UGent publication?
yes
classification
C1
copyright statement
I have transferred the copyright for this publication to the publisher
id
1864658
handle
http://hdl.handle.net/1854/LU-1864658
date created
2011-08-02 09:17:53
date last changed
2011-08-03 13:13:55
@inproceedings{1864658,
  abstract     = {In embedded systems, achieving good performances for signal processing applications is crucial for power management. Good compilation is required to have maximal use of the available processing capabilities. Compiling for communication-exposed architectures such as ADRES, TRIPS and Wavescalar is however a complex task. Dataflow graphs are mapped on execution unit grids in order to increase the instruction-level parallelism while minimizing communication. Complex algorithms and the large number of code optimizations make debugging hard for the developer. Moreover, iterative approaches are used to optimize the compiled code quality. This paper proposes to embed functional simulators in compilers in order to enable debugging and profiling-driven iterative compilation. Debugging of optimization passes is achieved by means of functional simulators, running the original code and the transformed code. Intermediate and output values results comparison allows to verify the correctness of the optimization pass. Using embedded simulators also allows to extract code and execution characteristics convenient for iterative compilation. We present the mechanisms required to control those simulators. A case study based on the TRIPS processor demonstrates the usefulness of our approach.},
  articleno    = {12109452},
  author       = {Delavallee, Thibault and Manet, Philippe and Vandierendonck, Hans and Legat, Jean-Didier},
  booktitle    = {Faible Tension Faible Consommation (FTFC - 2011)},
  isbn         = {9781612846460},
  keyword      = {profiling,simulation,embedded systems,compiler,debug},
  language     = {eng},
  location     = {Marrakech, Morocco},
  pages        = {12109452:55--12109452:58},
  publisher    = {IEEE},
  title        = {Embedding functional simulators in compilers for debugging and profiling},
  url          = {http://dx.doi.org/10.1109/FTFC.2011.5948917},
  year         = {2011},
}

Chicago
Delavallee, Thibault, Philippe Manet, Hans Vandierendonck, and Jean-Didier Legat. 2011. “Embedding Functional Simulators in Compilers for Debugging and Profiling.” In Faible Tension Faible Consommation (FTFC - 2011), 55–58. Piscataway, NJ, USA: IEEE.
APA
Delavallee, T., Manet, P., Vandierendonck, H., & Legat, J.-D. (2011). Embedding functional simulators in compilers for debugging and profiling. Faible Tension Faible Consommation (FTFC - 2011) (pp. 55–58). Presented at the Faible Tension Faible Consommation (FTFC - 2011), Piscataway, NJ, USA: IEEE.
Vancouver
1.
Delavallee T, Manet P, Vandierendonck H, Legat J-D. Embedding functional simulators in compilers for debugging and profiling. Faible Tension Faible Consommation (FTFC - 2011). Piscataway, NJ, USA: IEEE; 2011. p. 55–8.
MLA
Delavallee, Thibault, Philippe Manet, Hans Vandierendonck, et al. “Embedding Functional Simulators in Compilers for Debugging and Profiling.” Faible Tension Faible Consommation (FTFC - 2011). Piscataway, NJ, USA: IEEE, 2011. 55–58. Print.