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Abstract
This article presents the design of RecoNoC: a compact, highly flexible FPGA-based network-on-chip (NoC), that can be easily adapted for various experiments. In this work, we enhanced this NoC with dynamically reconfigurable shortcuts. These can be used to alter the NoC's topology to adapt to the system's communication needs. The design has been implemented and tested on a Xilinx Virtex-2 Pro FPGA, using the TMAP dynamic datafolding toolflow to automatically generate the reconfigurable hardware and the software reconfiguration procedures. The results show that, using dynamic datafolding, the overhead of introducing this shortcut mechanism is limited.
Keywords
dynamic data folding, Network-on-Chip, TMAP, FPGA, Run-time Reconfiguration

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Chicago
Vancayseele, Robbe, Brahim Al Farisi, Wim Heirman, Karel Bruneel, and Dirk Stroobandt. 2011. “RecoNoC: a Reconfigurable Network-on-chip.” In Reconfigurable Communication-centric Systems-on-Chip, 6th International Workshop, Proceedings.
APA
Vancayseele, R., Al Farisi, B., Heirman, W., Bruneel, K., & Stroobandt, D. (2011). RecoNoC: a reconfigurable network-on-chip. Reconfigurable Communication-centric Systems-on-Chip, 6th International workshop, Proceedings. Presented at the 6th International workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC  ’2011).
Vancouver
1.
Vancayseele R, Al Farisi B, Heirman W, Bruneel K, Stroobandt D. RecoNoC: a reconfigurable network-on-chip. Reconfigurable Communication-centric Systems-on-Chip, 6th International workshop, Proceedings. 2011.
MLA
Vancayseele, Robbe, Brahim Al Farisi, Wim Heirman, et al. “RecoNoC: a Reconfigurable Network-on-chip.” Reconfigurable Communication-centric Systems-on-Chip, 6th International Workshop, Proceedings. 2011. Print.
@inproceedings{1864247,
  abstract     = {This article presents the design of RecoNoC: a compact, highly flexible FPGA-based network-on-chip (NoC), that can be easily adapted for various experiments. In this work, we enhanced this NoC with dynamically reconfigurable shortcuts. These can be used to alter the NoC's topology to adapt to the system's communication needs. The design has been implemented and tested on a Xilinx Virtex-2 Pro FPGA, using the TMAP dynamic datafolding toolflow to automatically generate the reconfigurable hardware and the software reconfiguration procedures. The results show that, using dynamic datafolding, the overhead of introducing this shortcut mechanism is limited.},
  author       = {Vancayseele, Robbe and Al Farisi, Brahim and Heirman, Wim and Bruneel, Karel and Stroobandt, Dirk},
  booktitle    = {Reconfigurable Communication-centric Systems-on-Chip, 6th International workshop, Proceedings},
  keyword      = {dynamic data folding,Network-on-Chip,TMAP,FPGA,Run-time Reconfiguration},
  language     = {eng},
  location     = {Montpellier, France},
  title        = {RecoNoC: a reconfigurable network-on-chip},
  year         = {2011},
}