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Test of a majority-based reversible (quantum) 4 bits ripple-carry adder in adiabatic calculation

Stéphane Burignat UGent and Alexis De Vos UGent (2011) Mixed Design of Integrated Circuits and Systems, 18th International conference, Proceedings.
abstract
Quantum computing and circuits are of growing interest and so is reversible logic as it plays an important role in the synthesis of circuits dedicated to quantum computation. Moreover, reversible logic provides an alternative to classical computing machines, that may overcome many of the power dissipation problems in the near future. As a proof of concept we designed and tested a reversible 4 bits ripple-carry adder based on a do-spy-undo structure. This paper presents some performances obtained with such a chip processed in standard 0.35 μm CMOS technology and used in real reversible calculation (in this study, computations are performed in both directions such that addition and subtraction are made reversibly with the same chip). We also discuss the superiority of using adiabatic signals over classical rectangular pulses when using dual-line pass-transistor logic gates. Adiabatic signals allow the signal energy stored on the various capacitances of the circuit to be redistributed rather than being dissipated as heat. Finally, we show that adiabatic signals allow to avoid calculation errors introduced by the use of conventional rectangular pulses and allow to drastically reduce the number of pulse resynchronization in large circuits. Index Terms—reversible computation, design, implementation, pass-transistor logic, ripple-carry adder, Spectre simulation, quantum computation, adiabatic signal, test and measurement
Please use this url to cite or link to this publication:
author
organization
year
type
conference
publication status
in press
subject
keyword
reversible computation, adiabatic calculation, CMOS, pass-transistor, transmission gate, quantum-inspired circuit, circuit, ripple-carry adder, design, test, electrical measurement, threshold voltage, calculation error, delay
in
Mixed Design of Integrated Circuits and Systems, 18th International conference, Proceedings
pages
6 pages
conference name
18th International conference on Mixed Design of Integrated Circuits and Systems (MIXDES 2011)
conference location
Gliwice, Poland
conference start
2011-06-16
conference end
2011-06-18
language
English
UGent publication?
yes
classification
C1
copyright statement
I have transferred the copyright for this publication to the publisher
id
1853595
handle
http://hdl.handle.net/1854/LU-1853595
date created
2011-07-06 11:54:34
date last changed
2011-07-07 08:55:10
@inproceedings{1853595,
  abstract     = {Quantum computing and circuits are of growing interest and so is reversible logic as it plays an important role in the synthesis of circuits dedicated to quantum computation. Moreover, reversible logic provides an alternative to classical computing machines, that may overcome many of the power dissipation problems in the near future. As a proof of concept we designed and tested a reversible 4 bits ripple-carry adder based on a do-spy-undo structure. This paper presents some performances obtained with such a chip processed in standard 0.35 \ensuremath{\mu}m CMOS technology and used in real reversible calculation (in this study, computations are performed in both directions such that addition and subtraction are made reversibly with the same chip). We also discuss the superiority of using adiabatic signals over classical rectangular pulses when using dual-line pass-transistor logic gates. Adiabatic signals allow the signal energy stored on the various capacitances of the circuit to be redistributed rather than being dissipated as heat. Finally, we show that adiabatic signals allow to avoid calculation errors introduced by the use of conventional rectangular pulses and allow to drastically reduce the number of pulse resynchronization in large circuits. Index Terms---reversible computation, design, implementation, pass-transistor logic, ripple-carry adder, Spectre simulation, quantum computation, adiabatic signal, test and measurement},
  author       = {Burignat, St{\'e}phane and De Vos, Alexis},
  booktitle    = {Mixed Design of Integrated Circuits and Systems, 18th International conference, Proceedings},
  keyword      = {reversible computation,adiabatic calculation,CMOS,pass-transistor,transmission gate,quantum-inspired circuit,circuit,ripple-carry adder,design,test,electrical measurement,threshold voltage,calculation error,delay},
  language     = {eng},
  location     = {Gliwice, Poland},
  pages        = {6},
  title        = {Test of a majority-based reversible (quantum) 4 bits ripple-carry adder in adiabatic calculation},
  year         = {2011},
}

Chicago
Burignat, Stéphane, and Alexis De Vos. 2011. “Test of a Majority-based Reversible (quantum) 4 Bits Ripple-carry Adder in Adiabatic Calculation.” In Mixed Design of Integrated Circuits and Systems, 18th International Conference, Proceedings.
APA
Burignat, S., & De Vos, A. (2011). Test of a majority-based reversible (quantum) 4 bits ripple-carry adder in adiabatic calculation. Mixed Design of Integrated Circuits and Systems, 18th International conference, Proceedings. Presented at the 18th International conference on Mixed Design of Integrated Circuits and Systems (MIXDES 2011).
Vancouver
1.
Burignat S, De Vos A. Test of a majority-based reversible (quantum) 4 bits ripple-carry adder in adiabatic calculation. Mixed Design of Integrated Circuits and Systems, 18th International conference, Proceedings. 2011.
MLA
Burignat, Stéphane, and Alexis De Vos. “Test of a Majority-based Reversible (quantum) 4 Bits Ripple-carry Adder in Adiabatic Calculation.” Mixed Design of Integrated Circuits and Systems, 18th International Conference, Proceedings. 2011. Print.