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FPGA based real-time constrained time area optimized IIR design using digital-serial arithmetic

Rik Vlaminck, Jo Pletinckx, Stefaan Verschuere, Stijn Bertrem, Jan Vandewege (UGent) , P BOETS, G VANUYTSEL and S TEMMERMAN
(2002) Proceedings (on cd-rom) of the 6th WSEAS CSCC Multiconference, CSCC'2002, 7-14 July 2002, Rethymnon, Crete Island, Greece, paper 716 (5 pages). -.
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MLA
Vlaminck, Rik, et al. “FPGA Based Real-Time Constrained Time Area Optimized IIR Design Using Digital-Serial Arithmetic.” Proceedings (on Cd-Rom) of the 6th WSEAS CSCC Multiconference, CSCC’2002, 7-14 July 2002, Rethymnon, Crete Island, Greece, Paper 716 (5 Pages). -, 2002.
APA
Vlaminck, R., Pletinckx, J., Verschuere, S., Bertrem, S., Vandewege, J., BOETS, P., … TEMMERMAN, S. (2002). FPGA based real-time constrained time area optimized IIR design using digital-serial arithmetic. Proceedings (on Cd-Rom) of the 6th WSEAS CSCC Multiconference, CSCC’2002, 7-14 July 2002, Rethymnon, Crete Island, Greece, Paper 716 (5 Pages). -.
Chicago author-date
Vlaminck, Rik, Jo Pletinckx, Stefaan Verschuere, Stijn Bertrem, Jan Vandewege, P BOETS, G VANUYTSEL, and S TEMMERMAN. 2002. “FPGA Based Real-Time Constrained Time Area Optimized IIR Design Using Digital-Serial Arithmetic.” In Proceedings (on Cd-Rom) of the 6th WSEAS CSCC Multiconference, CSCC’2002, 7-14 July 2002, Rethymnon, Crete Island, Greece, Paper 716 (5 Pages). -.
Chicago author-date (all authors)
Vlaminck, Rik, Jo Pletinckx, Stefaan Verschuere, Stijn Bertrem, Jan Vandewege, P BOETS, G VANUYTSEL, and S TEMMERMAN. 2002. “FPGA Based Real-Time Constrained Time Area Optimized IIR Design Using Digital-Serial Arithmetic.” In Proceedings (on Cd-Rom) of the 6th WSEAS CSCC Multiconference, CSCC’2002, 7-14 July 2002, Rethymnon, Crete Island, Greece, Paper 716 (5 Pages). -.
Vancouver
1.
Vlaminck R, Pletinckx J, Verschuere S, Bertrem S, Vandewege J, BOETS P, et al. FPGA based real-time constrained time area optimized IIR design using digital-serial arithmetic. In: Proceedings (on cd-rom) of the 6th WSEAS CSCC Multiconference, CSCC’2002, 7-14 July 2002, Rethymnon, Crete Island, Greece, paper 716 (5 pages) -. 2002.
IEEE
[1]
R. Vlaminck et al., “FPGA based real-time constrained time area optimized IIR design using digital-serial arithmetic,” in Proceedings (on cd-rom) of the 6th WSEAS CSCC Multiconference, CSCC’2002, 7-14 July 2002, Rethymnon, Crete Island, Greece, paper 716 (5 pages). -, 2002.
@inproceedings{166758,
  author       = {{Vlaminck, Rik and Pletinckx, Jo and Verschuere, Stefaan and Bertrem, Stijn and Vandewege, Jan and BOETS, P and VANUYTSEL, G and TEMMERMAN, S}},
  booktitle    = {{Proceedings (on cd-rom) of the 6th WSEAS CSCC Multiconference, CSCC'2002, 7-14 July 2002, Rethymnon, Crete Island, Greece, paper 716 (5 pages). -}},
  isbn         = {{9608052637}},
  language     = {{eng}},
  title        = {{FPGA based real-time constrained time area optimized IIR design using digital-serial arithmetic}},
  year         = {{2002}},
}