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FPGA based real-time constrained time area optimized IIR design using digital-serial arithmetic.

Rik Vlaminck, Jo Pletinckx, Stefaan Verschuere, Stijn Bertrem, Jan Vandewege (UGent) , P BOETS, G VANUYTSEL and S TEMMERMAN
(2002) A series of Reference Books and Textbooks, Electrical and Computer Engineering Series, Recent Advances in Circuits, Systems and Signal Processing, 2002. p.75-79
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MLA
Vlaminck, Rik, et al. “FPGA Based Real-Time Constrained Time Area Optimized IIR Design Using Digital-Serial Arithmetic.” A Series of Reference Books and Textbooks, Electrical and Computer Engineering Series, Recent Advances in Circuits, Systems and Signal Processing, 2002, WSEAS, 2002, pp. 75–79.
APA
Vlaminck, R., Pletinckx, J., Verschuere, S., Bertrem, S., Vandewege, J., BOETS, P., … TEMMERMAN, S. (2002). FPGA based real-time constrained time area optimized IIR design using digital-serial arithmetic. In A series of Reference Books and Textbooks, Electrical and Computer Engineering Series, Recent Advances in Circuits, Systems and Signal Processing, 2002 (pp. 75–79). WSEAS.
Chicago author-date
Vlaminck, Rik, Jo Pletinckx, Stefaan Verschuere, Stijn Bertrem, Jan Vandewege, P BOETS, G VANUYTSEL, and S TEMMERMAN. 2002. “FPGA Based Real-Time Constrained Time Area Optimized IIR Design Using Digital-Serial Arithmetic.” In A Series of Reference Books and Textbooks, Electrical and Computer Engineering Series, Recent Advances in Circuits, Systems and Signal Processing, 2002, 75–79. WSEAS.
Chicago author-date (all authors)
Vlaminck, Rik, Jo Pletinckx, Stefaan Verschuere, Stijn Bertrem, Jan Vandewege, P BOETS, G VANUYTSEL, and S TEMMERMAN. 2002. “FPGA Based Real-Time Constrained Time Area Optimized IIR Design Using Digital-Serial Arithmetic.” In A Series of Reference Books and Textbooks, Electrical and Computer Engineering Series, Recent Advances in Circuits, Systems and Signal Processing, 2002, 75–79. WSEAS.
Vancouver
1.
Vlaminck R, Pletinckx J, Verschuere S, Bertrem S, Vandewege J, BOETS P, et al. FPGA based real-time constrained time area optimized IIR design using digital-serial arithmetic. In: A series of Reference Books and Textbooks, Electrical and Computer Engineering Series, Recent Advances in Circuits, Systems and Signal Processing, 2002. WSEAS; 2002. p. 75–9.
IEEE
[1]
R. Vlaminck et al., “FPGA based real-time constrained time area optimized IIR design using digital-serial arithmetic.,” in A series of Reference Books and Textbooks, Electrical and Computer Engineering Series, Recent Advances in Circuits, Systems and Signal Processing, 2002, WSEAS, 2002, pp. 75–79.
@incollection{166717,
  author       = {{Vlaminck, Rik and Pletinckx, Jo and Verschuere, Stefaan and Bertrem, Stijn and Vandewege, Jan and BOETS, P and VANUYTSEL, G and TEMMERMAN, S}},
  booktitle    = {{A series of Reference Books and Textbooks, Electrical and Computer Engineering Series, Recent Advances in Circuits, Systems and Signal Processing, 2002}},
  isbn         = {{960-8052-64-5}},
  language     = {{eng}},
  pages        = {{75--79}},
  publisher    = {{WSEAS}},
  title        = {{FPGA based real-time constrained time area optimized IIR design using digital-serial arithmetic.}},
  year         = {{2002}},
}