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Feynman's reversible logic gates, implemented in silicon.

Bart Desoete and Alexis De Vos UGent (1999) Proceedings of the 6 th Advanced Training Course on Mixed Design of VLSI Circuits, Technical University Lodz, Napieralski A. (ed.), Krakow, juni 1999. p.497-502
Please use this url to cite or link to this publication:
author
organization
year
type
conference
publication status
published
subject
in
Proceedings of the 6 th Advanced Training Course on Mixed Design of VLSI Circuits, Technical University Lodz, Napieralski A. (ed.), Krakow, juni 1999
pages
497-502 pages
language
English
UGent publication?
yes
classification
C1
id
117414
handle
http://hdl.handle.net/1854/LU-117414
date created
2004-01-14 13:35:00
date last changed
2016-12-19 15:35:36
@inproceedings{117414,
  author       = {Desoete, Bart and De Vos, Alexis},
  booktitle    = {Proceedings of the 6 th Advanced Training Course on Mixed Design of VLSI Circuits, Technical University Lodz, Napieralski A. (ed.), Krakow, juni 1999},
  language     = {eng},
  pages        = {497--502},
  title        = {Feynman's reversible logic gates, implemented in silicon.},
  year         = {1999},
}

Chicago
Desoete, Bart, and Alexis De Vos. 1999. “Feynman’s Reversible Logic Gates, Implemented in Silicon.” In Proceedings of the 6 Th Advanced Training Course on Mixed Design of VLSI Circuits, Technical University Lodz, Napieralski A. (ed.), Krakow, Juni 1999, 497–502.
APA
Desoete, B., & De Vos, A. (1999). Feynman’s reversible logic gates, implemented in silicon. Proceedings of the 6 th Advanced Training Course on Mixed Design of VLSI Circuits, Technical University Lodz, Napieralski A. (ed.), Krakow, juni 1999 (pp. 497–502).
Vancouver
1.
Desoete B, De Vos A. Feynman’s reversible logic gates, implemented in silicon. Proceedings of the 6 th Advanced Training Course on Mixed Design of VLSI Circuits, Technical University Lodz, Napieralski A. (ed.), Krakow, juni 1999. 1999. p. 497–502.
MLA
Desoete, Bart, and Alexis De Vos. “Feynman’s Reversible Logic Gates, Implemented in Silicon.” Proceedings of the 6 Th Advanced Training Course on Mixed Design of VLSI Circuits, Technical University Lodz, Napieralski A. (ed.), Krakow, Juni 1999. 1999. 497–502. Print.