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3D-DRAM Si/SiGe superlattices : inspection strategies and evaluation

Matteo Beggiato, Roger Loo (UGent) , Sun Wei, Alain Moussa, Gerhard Bast, Kaoru Fukaya, Dorin Cerbu, Nachiketa Janardan, Konstantin Chirko, Han Han, et al.
(2025) METROLOGY, INSPECTION, AND PROCESS CONTROL XXXIX. In Proceedings of SPIE 13426.
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Abstract
The growing interest in using Si/SiGe as a foundational material for 3D stackable DRAM and logic devices presents a significant challenge for inspection strategies, given the defect length scales, density and relative positions.1,2 Ensuring the quality of these templates is crucial to minimize current leakage and achieve high electrical efficiency. In this study, we explored various types of Si/SiGe-specific crystalline defects (e.g., misfits, threading dislocations and crosshatch), their z-positions (through stack, surface, at interface) and established correlations using multiple measurement techniques across a wide range of defect-specific interactions with various spectroscopic and microscopic techniques. High-throughput techniques like optical inspection and x-ray topography (XRT) were examined in their effectiveness in identifying misfits based on various physical characteristics. Additionally, high-resolution review techniques such as ebeam and atomic force microscopy (AFM) were tested to assess their ability to detect individual surface misfits and validate inspection results. The balance between throughput, sensitivity, and defect density was also analysed to optimize the detection capabilities of these techniques. Detecting threading dislocations (TDs) as a key objective was investigated using Electron Channelling Contrast Imaging (ECCI). While ECCI is a benchmark reference technique for TD detection, it faces significant throughput challenges. Despite these limitations, the presence of threading dislocations at the ends of misfits on 300mm wafers was identified. In summary, examining Si/SiGe-specific crystalline defects with a blend of high-throughput and high-resolution techniques is essential for optimizing the quality of Si/SiGe superlattices on 3D-DRAM and logic devices. This comprehensive approach can facilitate the development of more efficient inspection strategies, resulting in improved device reliability and electrical efficiency.
Keywords
3D-DRAM, crystalline defects, misfits, threading dislocations, Si/SiGe

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MLA
Beggiato, Matteo, et al. “3D-DRAM Si/SiGe Superlattices : Inspection Strategies and Evaluation.” METROLOGY, INSPECTION, AND PROCESS CONTROL XXXIX, edited by Matthew J. Sendelbach and Nivea G. Schuch, vol. 13426, SPIE, 2025, doi:10.1117/12.3052524.
APA
Beggiato, M., Loo, R., Wei, S., Moussa, A., Bast, G., Fukaya, K., … Bogdanowicz, J. (2025). 3D-DRAM Si/SiGe superlattices : inspection strategies and evaluation. In M. J. Sendelbach & N. G. Schuch (Eds.), METROLOGY, INSPECTION, AND PROCESS CONTROL XXXIX (Vol. 13426). https://doi.org/10.1117/12.3052524
Chicago author-date
Beggiato, Matteo, Roger Loo, Sun Wei, Alain Moussa, Gerhard Bast, Kaoru Fukaya, Dorin Cerbu, et al. 2025. “3D-DRAM Si/SiGe Superlattices : Inspection Strategies and Evaluation.” In METROLOGY, INSPECTION, AND PROCESS CONTROL XXXIX, edited by Matthew J. Sendelbach and Nivea G. Schuch. Vol. 13426. SPIE. https://doi.org/10.1117/12.3052524.
Chicago author-date (all authors)
Beggiato, Matteo, Roger Loo, Sun Wei, Alain Moussa, Gerhard Bast, Kaoru Fukaya, Dorin Cerbu, Nachiketa Janardan, Konstantin Chirko, Han Han, Masoud Dialameh, Gaetano Santoro, Gian F. Lorusso, Miki Isawa, Paul Wimmer, Christian Kranert, Christian Reimann, Markus Kuhn, Assunta Vigliante, Johan Meersschaut, Attilio Belmonte, Andrew Cross, Andrew Cockburn, Christophe Beral, Anne-Laure Charley, Gouri Sankar Kar, and Janusz Bogdanowicz. 2025. “3D-DRAM Si/SiGe Superlattices : Inspection Strategies and Evaluation.” In METROLOGY, INSPECTION, AND PROCESS CONTROL XXXIX, ed by. Matthew J. Sendelbach and Nivea G. Schuch. Vol. 13426. SPIE. doi:10.1117/12.3052524.
Vancouver
1.
Beggiato M, Loo R, Wei S, Moussa A, Bast G, Fukaya K, et al. 3D-DRAM Si/SiGe superlattices : inspection strategies and evaluation. In: Sendelbach MJ, Schuch NG, editors. METROLOGY, INSPECTION, AND PROCESS CONTROL XXXIX. SPIE; 2025.
IEEE
[1]
M. Beggiato et al., “3D-DRAM Si/SiGe superlattices : inspection strategies and evaluation,” in METROLOGY, INSPECTION, AND PROCESS CONTROL XXXIX, San Jose, CA, 2025, vol. 13426.
@inproceedings{01JV1WTRQ460NT7ZNG062DTM9Z,
  abstract     = {{The growing interest in using Si/SiGe as a foundational material for 3D stackable DRAM and logic devices presents a significant challenge for inspection strategies, given the defect length scales, density and relative positions.1,2 Ensuring the quality of these templates is crucial to minimize current leakage and achieve high electrical efficiency.
In this study, we explored various types of Si/SiGe-specific crystalline defects (e.g., misfits, threading dislocations and crosshatch), their z-positions (through stack, surface, at interface) and established correlations using multiple
measurement techniques across a wide range of defect-specific interactions with various spectroscopic and microscopic techniques.
High-throughput techniques like optical inspection and x-ray topography (XRT) were examined in their effectiveness in identifying misfits based on various physical characteristics. Additionally, high-resolution review techniques such as ebeam and atomic force microscopy (AFM) were tested to assess their ability to detect individual surface misfits and validate inspection results. The balance between throughput, sensitivity, and defect density was also analysed to optimize the detection capabilities of these techniques.
Detecting threading dislocations (TDs) as a key objective was investigated using Electron Channelling Contrast Imaging (ECCI). While ECCI is a benchmark reference technique for TD detection, it faces significant throughput challenges.
Despite these limitations, the presence of threading dislocations at the ends of misfits on 300mm wafers was identified.
In summary, examining Si/SiGe-specific crystalline defects with a blend of high-throughput and high-resolution techniques is essential for optimizing the quality of Si/SiGe superlattices on 3D-DRAM and logic devices. This comprehensive approach can facilitate the development of more efficient inspection strategies, resulting in improved device reliability and electrical efficiency.}},
  articleno    = {{1342612}},
  author       = {{Beggiato, Matteo and Loo, Roger and Wei, Sun and Moussa, Alain and Bast, Gerhard and Fukaya, Kaoru and Cerbu, Dorin and Janardan, Nachiketa and Chirko, Konstantin and Han, Han and Dialameh, Masoud and Santoro, Gaetano and Lorusso, Gian F. and Isawa, Miki and Wimmer, Paul and Kranert, Christian and Reimann, Christian and Kuhn, Markus and Vigliante, Assunta and Meersschaut, Johan and Belmonte, Attilio and Cross, Andrew and Cockburn, Andrew and Beral, Christophe and Charley, Anne-Laure and Kar, Gouri Sankar and Bogdanowicz, Janusz}},
  booktitle    = {{METROLOGY, INSPECTION, AND PROCESS CONTROL XXXIX}},
  editor       = {{Sendelbach, Matthew J. and Schuch, Nivea G.}},
  isbn         = {{9781510686380}},
  issn         = {{0277-786X}},
  keywords     = {{3D-DRAM,crystalline defects,misfits,threading dislocations,Si/SiGe}},
  language     = {{eng}},
  location     = {{San Jose, CA}},
  pages        = {{5}},
  publisher    = {{SPIE}},
  title        = {{3D-DRAM Si/SiGe superlattices : inspection strategies and evaluation}},
  url          = {{http://doi.org/10.1117/12.3052524}},
  volume       = {{13426}},
  year         = {{2025}},
}
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