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Abstract
We introduce a novel logic style with self-checking capability to enhance hardware reliability at logic level. The proposed logic cells have two-rail inputs/outputs, and the functionality for each rail of outputs enables construction of fault-tolerant configurable circuits. The AND and OR gates consist of 8 transistors based on CNFET technology, while the proposed XOR gate benefits from both CNFET and low-power MGDI technologies in its transistor arrangement. To demonstrate the feasibility of our new logic gates, we used an AES S-box implementation as the use case. The extensive simulation results using HSPICE indicate that the case-study circuit using on proposed gates has superior speed and power consumption compared to other implementations with error-detection capability.
Keywords
Digital circuits, logic level, error detection, self-checking, S-BOX

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MLA
Taheri, Mahdi, et al. “A Novel Fault-Tolerant Logic Style with Self-Checking Capability.” 2022 IEEE 28TH INTERNATIONAL SYMPOSIUM ON ON-LINE TESTING AND ROBUST SYSTEM DESIGN (IOLTS 2022), IEEE, 2022, pp. 1–6, doi:10.1109/iolts56730.2022.9897818.
APA
Taheri, M., Sheikhpour, S., Mahani, A., & Jenihhin, M. (2022). A novel fault-tolerant logic style with self-checking capability. 2022 IEEE 28TH INTERNATIONAL SYMPOSIUM ON ON-LINE TESTING AND ROBUST SYSTEM DESIGN (IOLTS 2022), 1–6. https://doi.org/10.1109/iolts56730.2022.9897818
Chicago author-date
Taheri, Mahdi, Saeideh Sheikhpour, Ali Mahani, and Maksim Jenihhin. 2022. “A Novel Fault-Tolerant Logic Style with Self-Checking Capability.” In 2022 IEEE 28TH INTERNATIONAL SYMPOSIUM ON ON-LINE TESTING AND ROBUST SYSTEM DESIGN (IOLTS 2022), 1–6. IEEE. https://doi.org/10.1109/iolts56730.2022.9897818.
Chicago author-date (all authors)
Taheri, Mahdi, Saeideh Sheikhpour, Ali Mahani, and Maksim Jenihhin. 2022. “A Novel Fault-Tolerant Logic Style with Self-Checking Capability.” In 2022 IEEE 28TH INTERNATIONAL SYMPOSIUM ON ON-LINE TESTING AND ROBUST SYSTEM DESIGN (IOLTS 2022), 1–6. IEEE. doi:10.1109/iolts56730.2022.9897818.
Vancouver
1.
Taheri M, Sheikhpour S, Mahani A, Jenihhin M. A novel fault-tolerant logic style with self-checking capability. In: 2022 IEEE 28TH INTERNATIONAL SYMPOSIUM ON ON-LINE TESTING AND ROBUST SYSTEM DESIGN (IOLTS 2022). IEEE; 2022. p. 1–6.
IEEE
[1]
M. Taheri, S. Sheikhpour, A. Mahani, and M. Jenihhin, “A novel fault-tolerant logic style with self-checking capability,” in 2022 IEEE 28TH INTERNATIONAL SYMPOSIUM ON ON-LINE TESTING AND ROBUST SYSTEM DESIGN (IOLTS 2022), Torino, ITALY, 2022, pp. 1–6.
@inproceedings{01JJM43ZHNPP4PF0A6V281XBP7,
  abstract     = {{We introduce a novel logic style with self-checking capability to enhance hardware reliability at logic level. The proposed logic cells have two-rail inputs/outputs, and the functionality for each rail of outputs enables construction of fault-tolerant configurable circuits. The AND and OR gates consist of 8 transistors based on CNFET technology, while the proposed XOR gate benefits from both CNFET and low-power MGDI technologies in its transistor arrangement. To demonstrate the feasibility of our new logic gates, we used an AES S-box implementation as the use case. The extensive simulation results using HSPICE indicate that the case-study circuit using on proposed gates has superior speed and power consumption compared to other implementations with error-detection capability.}},
  author       = {{Taheri, Mahdi and Sheikhpour, Saeideh and Mahani, Ali and Jenihhin, Maksim}},
  booktitle    = {{2022 IEEE 28TH INTERNATIONAL SYMPOSIUM ON ON-LINE TESTING AND ROBUST SYSTEM DESIGN (IOLTS 2022)}},
  isbn         = {{9781665473552}},
  issn         = {{1942-9398}},
  keywords     = {{Digital circuits,logic level,error detection,self-checking,S-BOX}},
  language     = {{eng}},
  location     = {{Torino, ITALY}},
  pages        = {{1--6}},
  publisher    = {{IEEE}},
  title        = {{A novel fault-tolerant logic style with self-checking capability}},
  url          = {{http://doi.org/10.1109/iolts56730.2022.9897818}},
  year         = {{2022}},
}

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