Epitaxial Si/SiGe multi-stacks : from stacked nano-sheet to fork-sheet and CFET devices
- Author
- Roger Loo (UGent) , A. Akula, Y. Shimura, C. Porret, E. Rosseel, T. Dursap, A. Y. Hikavyy, M. Beggiato, J. Bogdanowicz, A. Merkulov, M. Ayyad, H. Han, O. Richard, A. Impagnatiello, D. Wang, K. Yamamoto, T. Sipőcz, Á. Kerekes, H. Mertens, N. Horiguchi and R. Langer
- Organization
- Abstract
- After a short description of the evolution of metal-oxide-semiconductor device architectures and the corresponding requirements on epitaxial growth processes, the manuscript describes the material properties of complicated Si/SiGe multi-layer stacks used for complementary field effect transistor (CFET) devices. They contain two different Ge concentrations and have been grown using conventional process gases. A relatively high growth temperature is used to obtain acceptable Si and SiGe growth rates. Still island growth has been suppressed for Ge concentrations up to 40%. Excellent structural and optical material properties of the Si/SiGe multi-layer stack will be reported, with up to 3 + 3 Si channels in the top and bottom part of the stack, respectively. The absence/presence of lattice defects has also been verified by room-temperature photoluminescence measurements. Photoluminescence measurements at low temperatures are used to study band-to-band luminescence from individual sub-layers and to illustrate the optical material quality of the CFET stack.
- Keywords
- microelectronics - semiconductor materials, complementary FET, chemical vapor deposition, Si/SiGe multi-stacks, physical properties of electronic materials, SIGE
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Loo 2025 ECS J. Solid State Sci. Technol. 14 015003.pdf
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Citation
Please use this url to cite or link to this publication: http://hdl.handle.net/1854/LU-01JJ24G66X5534NDRK3MXPECVJ
- MLA
- Loo, Roger, et al. “Epitaxial Si/SiGe Multi-Stacks : From Stacked Nano-Sheet to Fork-Sheet and CFET Devices.” ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, vol. 14, no. 1, 2025, doi:10.1149/2162-8777/ada79f.
- APA
- Loo, R., Akula, A., Shimura, Y., Porret, C., Rosseel, E., Dursap, T., … Langer, R. (2025). Epitaxial Si/SiGe multi-stacks : from stacked nano-sheet to fork-sheet and CFET devices. ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, 14(1). https://doi.org/10.1149/2162-8777/ada79f
- Chicago author-date
- Loo, Roger, A. Akula, Y. Shimura, C. Porret, E. Rosseel, T. Dursap, A. Y. Hikavyy, et al. 2025. “Epitaxial Si/SiGe Multi-Stacks : From Stacked Nano-Sheet to Fork-Sheet and CFET Devices.” ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY 14 (1). https://doi.org/10.1149/2162-8777/ada79f.
- Chicago author-date (all authors)
- Loo, Roger, A. Akula, Y. Shimura, C. Porret, E. Rosseel, T. Dursap, A. Y. Hikavyy, M. Beggiato, J. Bogdanowicz, A. Merkulov, M. Ayyad, H. Han, O. Richard, A. Impagnatiello, D. Wang, K. Yamamoto, T. Sipőcz, Á. Kerekes, H. Mertens, N. Horiguchi, and R. Langer. 2025. “Epitaxial Si/SiGe Multi-Stacks : From Stacked Nano-Sheet to Fork-Sheet and CFET Devices.” ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY 14 (1). doi:10.1149/2162-8777/ada79f.
- Vancouver
- 1.Loo R, Akula A, Shimura Y, Porret C, Rosseel E, Dursap T, et al. Epitaxial Si/SiGe multi-stacks : from stacked nano-sheet to fork-sheet and CFET devices. ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY. 2025;14(1).
- IEEE
- [1]R. Loo et al., “Epitaxial Si/SiGe multi-stacks : from stacked nano-sheet to fork-sheet and CFET devices,” ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY, vol. 14, no. 1, 2025.
@article{01JJ24G66X5534NDRK3MXPECVJ,
abstract = {{After a short description of the evolution of metal-oxide-semiconductor device architectures and the corresponding requirements on epitaxial growth processes, the manuscript describes the material properties of complicated Si/SiGe multi-layer stacks used for complementary field effect transistor (CFET) devices. They contain two different Ge concentrations and have been grown using conventional process gases. A relatively high growth temperature is used to obtain acceptable Si and SiGe growth rates. Still island growth has been suppressed for Ge concentrations up to 40%. Excellent structural and optical material properties of the Si/SiGe multi-layer stack will be reported, with up to 3 + 3 Si channels in the top and bottom part of the stack, respectively. The absence/presence of lattice defects has also been verified by room-temperature photoluminescence measurements. Photoluminescence measurements at low temperatures are used to study band-to-band luminescence from individual sub-layers and to illustrate the optical material quality of the CFET stack.}},
articleno = {{015003}},
author = {{Loo, Roger and Akula, A. and Shimura, Y. and Porret, C. and Rosseel, E. and Dursap, T. and Hikavyy, A. Y. and Beggiato, M. and Bogdanowicz, J. and Merkulov, A. and Ayyad, M. and Han, H. and Richard, O. and Impagnatiello, A. and Wang, D. and Yamamoto, K. and Sipőcz, T. and Kerekes, Á. and Mertens, H. and Horiguchi, N. and Langer, R.}},
issn = {{2162-8769}},
journal = {{ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY}},
keywords = {{microelectronics - semiconductor materials,complementary FET,chemical vapor deposition,Si/SiGe multi-stacks,physical properties of electronic materials,SIGE}},
language = {{eng}},
number = {{1}},
pages = {{9}},
title = {{Epitaxial Si/SiGe multi-stacks : from stacked nano-sheet to fork-sheet and CFET devices}},
url = {{http://doi.org/10.1149/2162-8777/ada79f}},
volume = {{14}},
year = {{2025}},
}
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