Project: Automatic hardware generation by means of loop transformations in the polyedral model
- project duration
- 01-OCT-06 – 30-SEP-10
- To accelerate the hardware design, there is need for design methodology at a higher level of abstraction, where the productivity is higher and error charge is lower. One possible solution to this is the use of loop transformations. To fully exploit the automatic hardware generation, an estimation of the performance and the cost of a design is needed.