dr. ir. Karel Bruneel
No current affiliation with UGent
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Enabling FPGA routing configuration sharing in dynamic partial reconfiguration
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TCONMAP: technology mapping for parameterised FPGA configurations
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- Journal Article
- A1
- open access
Identification of dynamic circuit specialization opportunities in RTL code
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FASTER: facilitating analysis and synthesis technologies for effective reconfiguration
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TPaR: place and route tools for the dynamic reconfiguration of the FPGA's interconnect network
(2014) IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. 33(3). p.370-383 -
Efficient implementation of virtual coarse grained reconfigurable arrays on FPGAs
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- Conference Paper
- P1
- open access
StaticRoute: a novel router for the dynamic partial reconfiguration of FPGAs
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- Conference Paper
- C1
- open access
A novel tool flow for increased routing configuration similarity in multi-mode circuits
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- Conference Paper
- P1
- open access
A connection-based router for FPGAs
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Efficient implementation of virtual coarse grained reconfigurable arrays on FPGAS
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- Conference Paper
- C1
- open access
An automatic tool flow for the combined implementation of multi-mode circuits
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How to efficiently implement dynamic circuit specialization systems
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Proving correctness of regular expression matchers with constrained repetition
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FASTER: facilitating analysis and synthesis technologies for effective reconfiguration
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Automatically exploiting regularity in applications to reduce reconfiguration memory requirements