- ORCID iD
- 0000-0003-3430-1007
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In-circuit debugging with dynamic reconfiguration of FPGA interconnects
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VHDL design tool flow for portable FPGA implementation
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In-circuit fault tolerance for FPGAs using dynamic reconfiguration and virtual overlays
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- PhD Thesis
- open access
Novel hardware verification methods for FPGAs
(2019) -
An integrated on-silicon verification method for FPGA overlays
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Superimposed in-circuit debugging for self-healing FPGA overlays
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- Conference Paper
- P1
- open access
Superimposed In-circuit fault mitigation for dynamically reconfigurable FPGAs
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- Conference Paper
- C3
- open access
In-Circuit FPGA Debugging using Parameterised Reconfigurations
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SICTA : a superimposed in-circuit fault tolerant architecture for SRAM-based FPGAs
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Enhancing SEU mitigation with microscrubbing for commercial SRAM-based FPGAs