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- 2014
- Data Reuse buffer synthesis for nonrectangular domains
- The Hamiltonian-based odd-even routing method for 3D networks-on-chip
- Exploiting high-level synthesis tools for high-performance applications on FPGAs
- Adaptive and reconfigurable fault-tolerant routing method for 2D networks-on-chip
- Improving reconfiguration speed for dynamic circuit specialization using placement constraints
- Performance evaluation of dynamic circuit specialization on Xilinx FPGAs
- Automating data reuse in high-level synthesis
- Adaptive multicast routing method for 3D mesh-based networks-on-chip
- Characterizing traffic locality in 3D NoC-based CMPs using a path-based partitioning method
- On the impact of replacing a low-speed memory bus on the Maxeler platform, using the FPGA's configuration infrastructure