prof. dr. ir. Dirk Stroobandt
work address
Technologiepark Zwijnaarde 15, iGent
9052 Zwijnaarde
9052 Zwijnaarde
ORCID iD
0000-0002-4477-53131 – 10 of 252
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- 2016
- EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures
- Efficient hardware debugging using parameterized FPGA reconfiguration
- A 16-bit Reconfigurable encryption processor for Pi-Cipher
- A fully parameterized virtual coarse grained reconfigurable array for high performance computing applications
- How to efficiently reconfigure tunable lookup tables for dynamic circuit specialization
- Parameterised FPGA Reconfigurations for Efficient Test Set Generation
- 2015
- Estimating circuit delays in FPGAs after technology mapping
- Design and exploration of routing methods for NoC-based multicore systems
- Design of TSV-sharing topologies for cost-effective 3D networks-on-chip
- MiCAP: a custom reconfiguration controller for dynamic circuit specialization