prof. dr. ir. Dirk Stroobandt
- Work address
-
Technologiepark Zwijnaarde 126
9052 Zwijnaarde - Dirk.Stroobandt@UGent.be
- ORCID iD
-
0000-0002-4477-5313
Show
Sort by
-
In-circuit debugging with dynamic reconfiguration of FPGA interconnects
-
3D NoC emulation model on a single FPGA
-
Accelerating FPGA routing through algorithmic enhancements and connection-aware parallelization
-
On the exploration of connection-aware partitioning for parallel FPGA routing
-
- Conference Paper
- P1
- open access
CRoute: a fast high-quality timing-driven connection-based FPGA router
-
VHDL design tool flow for portable FPGA implementation
-
Reco-Pi : a reconfigurable cryptoprocessor for π-Cipher
-
A new adaptation of particle swarm optimization applied to modern FPGA placement
-
In-circuit fault tolerance for FPGAs using dynamic reconfiguration and virtual overlays
-
MODA-PSO : towards fast hard block legalization for analytical FPGA placement