prof. dr. ir. Dirk Stroobandt
- Work address
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Technologiepark Zwijnaarde 15, iGent
9052 Zwijnaarde - Dirk.Stroobandt@UGent.be
- ORCID iD
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https://orcid.org/0000-0002-4477-5313
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Traffic-aware reconfigurable architecture for fault-tolerant 2D mesh NoCs
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How preserving circuit design hierarchy during FPGA packing leads to better performance
(2018) IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. 37(3). p.629-642 -
A NoC-based custom FPGA configuration memory architecture for ultra-fast micro-reconfiguration
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Dynamically reconfigurable architecture for fault-tolerant 2D Networks-on-Chip
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Adaptive and reconfigurable bubble routing technique for 2D Torus interconnection networks
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Adaptive state space representations enabling reliable and robust decision-making in asynchronous drives for mechatronic applications
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- conference
- C3
- open access
In-Circuit FPGA Debugging using Parameterised Reconfigurations
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SICTA : a superimposed in-circuit fault tolerant architecture for SRAM-based FPGAs
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Pixie : a heterogeneous virtual coarse-grained reconfigurable array for high performance image processing applications
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Runtime-quality tradeoff in partitioning based multithreaded packing