- ORCID iD
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0000-0003-3163-9432
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- PhD Thesis
- open access
Hierarchical techniques for improved FPGA design tools
(2020) -
Accelerating FPGA routing through algorithmic enhancements and connection-aware parallelization
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On the exploration of connection-aware partitioning for parallel FPGA routing
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- Conference Paper
- P1
- open access
CRoute: a fast high-quality timing-driven connection-based FPGA router
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A new adaptation of particle swarm optimization applied to modern FPGA placement
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MODA-PSO : towards fast hard block legalization for analytical FPGA placement
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Hierarchical force-based block spreading for analytical FPGA placement
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How preserving circuit design hierarchy during FPGA packing leads to better performance
(2018) IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. 37(3). p.629-642 -
Liquid : high quality scalable placement for large heterogeneous FPGAs
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Runtime-quality tradeoff in partitioning based multithreaded packing